Inventor

Dietrich Widmann

Inventor
Unterhaching, DE

Overview

28→
Patents
1976–2004
Patent span
Electricity
Primary field (CPC H)

Patents· 28 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Dprimary
H10DInorganic electric semiconductor devices28%
H10BElectronic memory devices19%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1013%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1011%
G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices9%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests9%
B82YSpecific uses or applications of nanostructures4%
H10NElectric solid-state devices not otherwise provided for4%
H01GCapacitors2%
Y10TTechnical subjects covered by former us classification2%
PatentTitleYear
6,686,098'Lithography method and lithography mask'20046,635,388'Contact hole fabrication with the aid of mutually crossing sudden phase shift edges of a single phase shift mask'20036,515,319'Field-effect-controlled transistor and method for fabricating the transistor'20036,503,784'Double gated transistor'20036,472,767'Static random access memory (SRAM)'20026,468,812'Method for producing a semiconductor memory device with a multiplicity of memory cells'20026,459,123'Double gated transistor'20026,404,034'CMOS circuit with all-around dielectrically insulated source-drain regions'20026,319,787'Method for forming a high surface area trench capacitor'20016,262,448'Memory cell having trench capacitor and vertical, dual-gated transistor'20016,232,169'Method for producing a capacitor'20016,124,156'Process for manufacturing a CMOS circuit with all-around dielectrically insulated source-drain regions'20006,022,786'Method for manufacturing a capacitor for a semiconductor arrangement'20005,989,972'Capacitor in a semiconductor configuration and process for its production'19995,869,860'Ferroelectric memory device and method for producing the device'19994,562,640'Method of manufacturing stable, low resistance contacts in integrated semiconductor circuits'19864,382,826'Method of making MIS-field effect transistor having a short channel length'19834,356,622'Method of producing low-resistance diffused regions in IC MOS semiconductor circuits in silicon-gate technology metal silicide layer formation'19824,352,237'Method for manufacture of integrated semiconductor circuits, in particular CCD-circuits, with self-adjusting, nonoverlapping polysilicon electrodes'19824,351,100'Method for manufacture of integrated semiconductor circuits, in particular CCD-circuits, with self-adjusting, nonoverlapping polysilicon electrodes'19824,313,256'Method of producing integrated MOS circuits via silicon gate technology'19824,291,321'MIS-field effect transistor having a short channel length and method of making the same'19814,268,563'Radiation mask for producing structural configurations in photo-sensitive resists by X-ray exposure'19814,211,888'Arrangement with several thermal elements in series connection'19804,108,717'Process for the production of fine structures consisting of a vapor-deposited material on a base'19784,090,068'Process for the automatic adjustment of semiconductor wafers'19784,047,975'Process for the production of a bipolar integrated circuit'19773,953,877'Semiconductors covered by a polymeric heat resistant relief structure'1976

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1976–2001Patents assigned to SIEMENS AG (17)· patent assignee history
1976–2004Based in Unterhaching, DE· patent location history
2000–2004Patents assigned to INFINEON TECHNOLOGIES AG (8)· patent assignee history
2001Patents assigned to INFINEON TECHNOLOGIES CORP (1)· patent assignee history
2002–2003Patents assigned to INFINEON TECHNOLOGIES RICHMOND (2)· patent assignee history
2003Based in Glen Allen, VA, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
SIEMENS AG171976–2001
INFINEON TECHNOLOGIES AG82000–2004
INFINEON TECHNOLOGIES RICHMOND22002–2003
INFINEON TECHNOLOGIES CORP12001
Locations
LocationPatentsSpan
Unterhaching, DE271976–2004
Glen Allen, Virginia, US12003