Inventor
Shih-Hsiung S. Tung
Inventor
Austin, TX, US
Overview
Patents· 30 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing94%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use6%
PatentTitleYear
10,824,494Operation of a multi-slice processor implementing exception handling in a nested translation environment202010,664,275Speeding up younger store instruction execution after a sync instruction202010,534,715Operation of a multi-slice processor implementing a unified page walk cache202010,417,002Hazard detection of out-of-order execution of load and store instructions in processors without using real addresses201910,324,856Address translation for sending real address to memory subsystem in effective address based load-store unit201910,318,419Flush avoidance in a load store unit201910,310,988Address translation for sending real address to memory subsystem in effective address based load-store unit201910,067,765Speeding up younger store instruction execution after a sync instruction201810,042,691Operation of a multi-slice processor implementing exception handling in a nested translation environment20189,086,986'Detection of conflicts between transactions and page shootdowns'20159,086,987'Detection of conflicts between transactions and page shootdowns'20158,086,801'Loading data to vector renamed register from across multiple cache lines'20117,949,859'Mechanism for avoiding check stops in speculative accesses while operating in real mode'20117,370,177'Mechanism for avoiding check stops in speculative accesses while operating in real mode'20087,254,678'Enhanced STCX design to improve subsequent load efficiency'20076,463,514'Method to arbitrate for a cache block'20026,446,170'Efficient store machine in cache based microprocessor'20026,430,680'Processor and method of prefetching data based upon a detected stride'20026,304,939'Token mechanism for cache-line replacement within a cache memory having redundant cache lines'20016,298,417'Pipelined cache memory deallocation and storeback'20016,275,918'Obtaining load target operand pre-fetch address from history table information upon incremented number of access indicator threshold'20016,240,487'Integrated cache buffers'20016,202,128'Method and system for pre-fetch cache interrogation using snoop port'20016,148,394'Apparatus and method for tracking out of order load instructions to avoid data coherency violations in a processor'20006,112,297'Apparatus and method for processing misaligned load instructions in a processor supporting out of order execution'20006,108,753'Cache error retry technique'20006,085,291'System and method for selectively controlling fetching and prefetching of data to a processor'20006,041,390'Token mechanism for cache-line replacement within a cache memory having redundant cache lines'20005,802,567'Mechanism for managing offset and aliasing conditions within a content-addressable memory-based cache memory'19985,319,761'Directory look-aside table for a virtual storage system including means for minimizing synonym entries'1994Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1994–2020Patents assigned to IBM (30)· patent assignee history
1994Based in Kingston, NY, US· patent location history
1998–2020Based in Austin, TX, US· patent location history
2011–2018Patents assigned to RAY DAVID S (2)· patent assignee history
2011Based in Austn, TX, US· patent location history
2015–2018Patents assigned to LE HUNG Q (2)· patent assignee history
2015Patents assigned to CAIN III HAROLD W (1)· patent assignee history
2018Patents assigned to EISEN SUSAN E (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 30 | 1994–2020 |
| LE HUNG Q | 2 | 2015–2018 |
| RAY DAVID S | 2 | 2011–2018 |
| CAIN III HAROLD W | 1 | 2015 |
| EISEN SUSAN E | 1 | 2018 |
Locations
| Location | Patents | Span |
|---|---|---|
| Austin, Texas, US | 28 | 1998–2020 |
| Austn, Texas, US | 1 | 2011 |
| Kingston, New York, US | 1 | 1994 |