LexDanaLexDanabeta
Inventor

Todd E. Humes

Inventor
Shoreline, WA, US

Overview

55→
Patents
2000–2021
Patent span
Electricity
Primary field (CPC H)

Patents· 55 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Kprimary
G06KGraphical data reading23%
G11CStatic stores13%
H10BElectronic memory devices12%
H10DInorganic electric semiconductor devices11%
H03FAmplifiers9%
H03GControl of amplification7%
G06FElectric digital data processing4%
H03MCoding3%
H04WWireless communication networks3%
H01QAntennas, i.e. radio aerials2%
PatentTitleYear
10,936,929RFID integrated circuits with electrical bridges202110,733,395Location-based access to RFID tag information202010,311,353RFID integrated circuits with electrical bridges201910,204,245Location-based access to RFID tag information20199,959,435Location-based access to RFID tag information20188,759,937'Schottky junction diode devices in CMOS with multiple wells'20148,350,665'RFID reader systems detecting pilot tone'20138,294,582'Multiple RF-port modulator for RFID tag'20128,224,610'Radio-frequency identification tag with oscillator calibration'20128,122,307'One time programmable memory test structures and methods'20128,102,007'Apparatus for trimming high-resolution digital-to-analog converter'20128,076,707'Pseudo-nonvolatile direct-tunneling floating-gate device'20117,732,887'Schottky junction diode devices in CMOS'20107,724,570'Adaptive programming of memory circuit including writing data in cells of a memory circuit'20107,724,571'Methods for adaptive programming of memory circuit including writing data in cells of a memory circuit'20107,667,589'RFID tag uncoupling one of its antenna ports and methods'20107,616,120'Multiple RF-port modulator for RFID tag'20097,548,460'Floating-gate semiconductor structures'20097,528,728'Circuits for RFID tags with multiple non-independently driven RF ports'20097,472,835'RFID system components implementing adjusted backscatter calculations and methods'20097,436,308'Adjusting RFID waveform shape in view of signal from another reader'20087,432,814'Reconstructing RFID waveform shape for reuse in individual channel'20087,417,548'Adjusting RFID waveform shape in view of signal from an RFID tag'20087,411,828'Method and apparatus for programming single-poly pFET-based nonvolatile memory cells'20087,411,829'Method and apparatus for programming single-poly pFET-based nonvolatile memory cells'20087,408,466'Adjusting RFID waveform shape in view of detected RF energy'20087,408,809'Method and apparatus for programming single-poly pFET-based nonvolatile memory cells'20087,394,324'Method and system to calibrate an oscillator within an RFID circuit utilizing a test signal supplied to the RFID circuit'20087,391,329'Performance driven adjustment of RFID waveform shape'20087,389,101'Use of analog-valued floating-gate transistors for parallel and serial signal processing'20087,388,468'Method and system to backscatter modulate a radio-frequency signal from an RFID tag in accordance with both an oscillation frequency signal and a command signal'20087,388,420'Rewriteable electronic fuses'20087,263,001'Compact non-volatile memory cell and array system'20077,253,719'Multi-oscillator clock signals'20077,246,751'RFID tags calibrating backscattering period also for non-integer divide ratios'20077,245,213'RFID readers and RFID tags exchanging encrypted password'20077,242,614'Rewriteable electronic fuses'20077,199,663'Use of analog-valued floating-gate transistors for parallel and serial signal processing'20077,187,237'Use of analog-valued floating-gate transistors for parallel and serial signal processing'20077,177,182'Rewriteable electronic fuses'20077,149,118'Method and apparatus for programming single-poly pFET-based nonvolatile memory cells'20067,120,550'Radio-frequency identification circuit oscillator calibration'20067,102,438'Autozeroing floating-gate amplifier'20067,098,498'Floating-gate semiconductor structures'20067,061,324'Use of analog-valued floating-gate transistors for parallel and serial signal processing'20067,049,872'Use of analog-valued floating-gate transistors to match the electrical characteristics of interleaved and pipelined circuits'20067,038,603'Analog to digital converter using analog-valued floating-gate transistors'20067,038,544'Use of analog-valued floating-gate transistors for parallel and serial signal processing'20066,965,142'Floating-gate semiconductor structures'20056,958,646'Autozeroing floating-gate amplifier'20056,826,371'Variable rate DPSK system architecture'20046,766,154'Fast settling fine stepping phase locked loops'20046,664,909'Method and apparatus for trimming high-resolution digital-to-analog converter'20036,396,605'Apparatus and method for tuning an optical interferometer'20026,064,507'High speed differential optoelectronic receiver'2000

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2000–2002Based in Thousand Oaks, CA, US· patent location history
2003–2021Patents assigned to IMPINJ INC (40)· patent assignee history
2003–2021Based in Shoreline, WA, US· patent location history
2004Based in Newbury Park, CA, US· patent location history
2008–2014Patents assigned to HUMES TODD E (9)· patent assignee history
2008–2013Patents assigned to DIORIO CHRISTOPHER J (6)· patent assignee history
2008–2009Based in Seattle, WA, US· patent location history
2010Patents assigned to VIRAGE LOGIC CORP (3)· patent assignee history
2011–2014Patents assigned to SYNOPSYS INC (4)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
IMPINJ INC402003–2021
HUMES TODD Eself92008–2014
DIORIO CHRISTOPHER J62008–2013
SYNOPSYS INC42011–2014
VIRAGE LOGIC CORP32010
Locations
LocationPatentsSpan
Shoreline, Washington, US502003–2021
Seattle, Washington, US22008–2009
Thousand Oaks, California, US22000–2002
Newbury Park, California, US12004