Inventor
Chang-Chia Huang
Inventor
Hsinchu, TW
Overview
Patents· 20 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1034%
H01LSemiconductor devices29%
H10DInorganic electric semiconductor devices11%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h109%
Y10TTechnical subjects covered by former us classification5%
Y02EReduction of greenhouse gas [ghg] emissions, related to energy generation, transmission or distribution4%
B32BLayered products, i.e. products built-up of strata of flat or non-flat, e.g. cellular or honeycomb, form2%
G06FElectric digital data processing2%
H04LTransmission of digital information, e.g. telegraphic communication2%
H04MTelephonic communication2%
PatentTitleYear
10,817,016Hybrid coverlay/window structure for flexible display applications202010,700,033Packaging device and method of making the same202010,453,813Contact pad for semiconductor device201910,050,001Packaging device and method of making the same20189,978,656Mechanisms for forming fine-pitch copper bump structures20189,953,939Conductive contacts having varying widths and method of manufacturing same20189,786,520'Semiconductor device and manufacturing method thereof'20179,691,686'Contact pad for semiconductor device'20179,613,931'Fan-out stacked system in package (SIP) having dummy dies and methods of making the same'20179,583,367'Methods and apparatus for bump-on-trace chip packaging'20179,508,668'Conductive contacts having varying widths and method of manufacturing same'20169,449,933'Packaging device and method of making the same'20169,209,046'Semiconductor device and manufacturing method thereof'20159,165,796'Methods and apparatus for bump-on-trace chip packaging'20159,105,530'Conductive contacts having varying widths and method of manufacturing same'20158,987,915'Semiconductor structure and manufacturing method thereof'20158,922,006'Elongated bumps in integrated circuit devices'20148,883,628'Electrical connection structure'20148,866,285'Fan-out package comprising bulk metal'20148,476,759'Electrical connection structure'2013Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2013–2015Patents assigned to TAIWAN SEMICONDUCTOR MFG (8)· patent assignee history
2013–2016Patents assigned to HUANG CHANG-CHIA (4)· patent assignee history
2013–2014Patents assigned to CHEN CHEN-SHIEN (3)· patent assignee history
2013–2016Patents assigned to LIN TSUNG-SHU (3)· patent assignee history
2013–2020Based in Hsinchu, TW· patent location history
2016–2020Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (11)· patent assignee history
2020Based in San Jose, CA, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TAIWAN SEMICONDUCTOR MFG CO LTD | 11 | 2016–2020 |
| TAIWAN SEMICONDUCTOR MFG | 8 | 2013–2015 |
| HUANG CHANG-CHIAself | 4 | 2013–2016 |
| CHEN CHEN-SHIEN | 3 | 2013–2014 |
| LIN TSUNG-SHU | 3 | 2013–2016 |
Locations
| Location | Patents | Span |
|---|---|---|
| Hsinchu, TW | 19 | 2013–2020 |
| San Jose, California, US | 1 | 2020 |