Inventor
Gunnar Krause
Inventor
Mnchen, DE
Overview
Patents· 31 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G11Cprimary
G11CStatic stores63%
G01RMeasuring electric variables25%
G06FElectric digital data processing5%
H03KPulse technique5%
G01KMeasuring temperature3%
PatentTitleYear
7,117,404'Test circuit for testing a synchronous memory circuit'20067,117,403'Method and device for generating digital signal patterns'20067,062,690'System for testing fast synchronous digital circuits, particularly semiconductor memory chips'20066,973,008'Apparatus for flexible deactivation of word lines of dynamic memory modules and method therefor'20056,971,039'DDR to SDR conversion that decodes read and write accesses and forwards delayed commands to first and second memory modules'20056,957,373'Address generator for generating addresses for testing a circuit'20056,871,306'Method and device for reading and for checking the time position of data response signals read out from a memory module to be tested'20056,865,707'Test data generator'20056,862,702'Address counter for addressing synchronous high-frequency digital circuits, in particular memory devices'20056,853,206'Method and probe card configuration for testing a plurality of integrated circuits in parallel'20056,839,397'Circuit configuration for generating control signals for testing high-frequency synchronous digital circuits'20056,812,689'Method and device for offset-voltage free voltage measurement and adjustment of a reference voltage source of an integrated semiconductor circuit'20046,779,124'Selectively deactivating a first control loop in a dual control loop circuit during data transmission'20046,762,611'Test configuration and test method for testing a plurality of integrated circuits in parallel'20046,756,699'Device and method for calibrating the pulse duration of a signal source'20046,744,272'Test circuit'20046,728,147'Method for on-chip testing of memory cells of an integrated memory circuit'20046,721,904'System for testing fast integrated digital circuits, in particular semiconductor memory modules'20046,618,305'Test circuit for testing a circuit'20036,612,738'Method for determining the temperature of a semiconductor chip and semiconductor chip with temperature measuring configuration'20036,581,171'Circuit configuration for the burn-in test of a semiconductor module'20036,556,492'System for testing fast synchronous semiconductor circuits'20036,459,649'Address generator for generating addresses for an on-chip trim circuit'20026,400,630'Circuit configuration having a variable number of data outputs and device for reading out data from the circuit configuration with the variable number of data outputs'20026,313,655'Semiconductor component and method for testing and operating a semiconductor component'20016,274,410'Method of programming a semiconductor memory'20016,229,343'Integrated circuit with two operating states'20016,180,992'Fuse configuration for a semiconductor storage device'20016,157,589'Dynamic semiconductor memory device and method for initializing a dynamic semiconductor memory device'20006,097,233'Adjustable delay circuit'20005,959,911'Apparatus and method for implementing a bank interlock scheme and related test mode for multibank memory devices'1999Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1999–2004Patents assigned to SIEMENS AG (5)· patent assignee history
1999Based in Burlington, VT, US· patent location history
2000–2005Based in Munich, DE· patent location history
2001–2006Patents assigned to INFINEON TECHNOLOGIES AG (23)· patent assignee history
2002–2004Based in Mnchen, DE· patent location history
2003Patents assigned to INFINEON TECHNOLOGIES (1)· patent assignee history
2004Patents assigned to INFINEON TECHOLOGIES AG (1)· patent assignee history
2005–2006Based in München, DE· patent location history
2005Based in Markt Schwaben, DE· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| INFINEON TECHNOLOGIES AG | 23 | 2001–2006 |
| SIEMENS AG | 5 | 1999–2004 |
| INFINEON TECHNOLOGIES | 1 | 2003 |
| INFINEON TECHOLOGIES AG | 1 | 2004 |
Locations
| Location | Patents | Span |
|---|---|---|
| Mnchen, DE | 11 | 2002–2004 |
| Munich, DE | 9 | 2000–2005 |
| München, DE | 8 | 2005–2006 |
| Markt Schwaben, DE | 2 | 2005 |
| Burlington, VT, US | 1 | 1999 |