Inventor
Fumihiko Noro
Inventor
Kyoto, JP
Overview
Patents· 23 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Bprimary
H10BElectronic memory devices45%
H10DInorganic electric semiconductor devices39%
G11CStatic stores5%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests5%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h103%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h103%
PatentTitleYear
7,951,679'Method for fabricating semiconductor device'20117,807,557'Method of forming a semiconductor device having a trapping film for charge accumulation'20107,781,291'Semiconductor device and method for fabricating the same'20107,704,803'Semiconductor device having diffusion layers as bit lines and method for manufacturing the same'20107,598,589'Semiconductor device'20097,476,943'Semiconductor device having diffusion layers as bit lines and method for manufacturing the same'20097,446,381'Semiconductor memory device and method for fabricating the same'20087,060,627'Method of decreasing charging effects in oxide-nitride-oxide (ONO) memory arrays'20066,872,624'Method of fabricating nonvolatile semiconductor memory device'20056,867,118'Semiconductor memory and method for fabricating the same'20056,830,973'Nonvolatile semiconductor memory device and method of manufacturing the same'20046,828,621'Nonvolatile semiconductor memory device and method for fabricating the same'20046,791,139'Semiconductor memory and method for fabricating the same'20046,784,040'Nonvolatile semiconductor memory device and method for fabricating the same'20046,734,067'Method of forming a semiconductor storage device'20046,686,622'Semiconductor memory device and manufacturing method thereof'20046,642,572'Nonvolatile semiconductor memory device and method for fabricating the same'20036,558,997'Method for fabricating the control and floating gate electrodes without having their upper surface silicided'20036,545,312'Nonvolatile semiconductor memory device and method for fabricating the same'20036,320,217'Semiconductor memory device'20016,143,609'Method for forming semiconductor memory device'20005,838,039'Semiconductor memory having a tunneling region'19985,491,101'Manufacturing method of non-volatile semiconductor memory devices'1996Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1996Patents assigned to MATSUSHITA ELECTRONICS COMPANY (1)· patent assignee history
1998–2000Patents assigned to MATSUSHITA ELECTRONICS CORP (2)· patent assignee history
1998Based in Kkoma, JP· patent location history
2000Based in Ikoma, JP· patent location history
2001–2008Patents assigned to MATSUSHITA ELECTRIC INDUSTRIAL CO LTD (13)· patent assignee history
2001–2005Based in Kyotanabe, JP· patent location history
2003–2004Patents assigned to HALO LSI DESIGN & DEVICE TECH (2)· patent assignee history
2003–2006Based in Kyoto, JP· patent location history
2008–2011Based in Toyama, JP· patent location history
2009–2011Patents assigned to PANASONIC CORP (6)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| MATSUSHITA ELECTRIC INDUSTRIAL CO LTD | 13 | 2001–2008 |
| PANASONIC CORP | 6 | 2009–2011 |
| HALO LSI DESIGN & DEVICE TECH | 2 | 2003–2004 |
| MATSUSHITA ELECTRONICS CORP | 2 | 1998–2000 |
| MATSUSHITA ELECTRONICS COMPANY | 1 | 1996 |
Locations
| Location | Patents | Span |
|---|---|---|
| Kyoto, JP | 10 | 2003–2006 |
| Toyama, JP | 7 | 2008–2011 |
| Kyotanabe, JP | 3 | 2001–2005 |
| Ikoma, JP | 1 | 2000 |
| Kkoma, JP | 1 | 1998 |