Inventor
Gerben Doornbos
Inventor
Leuven, BE
Overview
Patents· 65 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices34%
H01LSemiconductor devices28%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1014%
B82YSpecific uses or applications of nanostructures11%
H10BElectronic memory devices5%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h104%
H10KOrganic electric solid-state devices2%
C01BNon-metallic elements1%
C23CCoating metallic material1%
G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices1%
PatentTitleYear
11,088,337Methods of manufacturing a field effect transistor using carbon nanotubes and field effect transistors202111,069,813Localized heating in laser annealing process202111,056,568Method for manufacturing horizontal-gate-all-around devices with different number of nanowires202111,024,548Complementary MOS FETS vertically arranged and including multiple dielectric layers surrounding the MOS FETS202111,004,958Method of manufacturing a semiconductor device and a semiconductor device202111,004,789Semiconductor device including back side power supply circuit202110,991,576Crystalline semiconductor layer formed in BEOL processes202110,978,557Method of fabricating semiconductor device with nanowires202110,971,684Intercalated metal/dielectric structure for nonvolatile memory devices202110,950,546Semiconductor device including back side power supply circuit202110,943,832Semiconductor device and manufacturing method thereof202110,923,659Wafers for use in aligning nanotubes and methods of making and using the same202110,923,581Method for forming semiconductor structure202110,872,972Vertical tunnel field effect transistor (FET)202010,868,154Semiconductor device and manufacturing method thereof202010,867,866Semiconductor device and manufacturing method thereof202010,770,358Semiconductor device and manufacturing method thereof202010,756,174Multiple-stacked semiconductor nanowires and source/drain spacers202010,727,427Method of manufacturing a field effect transistor using carbon nanotubes and a field effect transistor202010,680,062III-V semiconductor layers, III-V semiconductor device and methods of manufacturing thereof202010,679,988Semiconductor device including FinFETS having different channel heights and manufacturing method thereof202010,672,899Tunnel field-effect transistor with reduced trap-assisted tunneling leakage202010,629,501Gate all-around semiconductor device including a first nanowire structure and a second nanowire structure202010,535,780Semiconductor device including an epitaxial layer wrapping around the nanowires202010,516,039Semiconductor device and manufacturing method thereof201910,505,025Tunnel field-effect transistor and method for forming the same201910,475,907Vertical tunnel field effect transistor (FET)201910,453,752Method of manufacturing a gate-all-around semiconductor device201910,332,970Method for manufacturing horizontal-gate-all-around devices with different number of nanowires201910,332,965Semiconductor device and method of fabricating the same201910,276,719Method of manufacturing a semiconductor device and a semiconductor device201910,263,073III-V semiconductor layers, III-V semiconductor devices and methods of manufacturing thereof201910,170,378Gate all-around semiconductor device and manufacturing method thereof201910,164,024Heterostructures for semiconductor devices and methods of forming the same201810,134,841Nanowire semiconductor device structure and method of manufacturing201810,050,111Semiconductor device channel system and method20189,871,101'Semiconductor device and manufacturing method thereof'20189,871,104'Nanowire semiconductor device structure and method of manufacturing'20189,793,408'Fin field effect transistor (FinFET)'20179,761,666'Strained channel field effect transistor'20179,735,239'Semiconductor device channel system and method'20179,711,632'Intra-band tunnel FET'20179,646,823'Semiconductor dielectric interface and gate stack'20179,647,097'Vertical tunnel field effect transistor (FET)'20179,472,468'Nanowire CMOS structure and formation methods'20169,412,871'FinFET with channel backside passivation layer device and method'20169,406,791'Transistors, semiconductor devices, and methods of manufacture thereof'20169,385,198'Heterostructures for semiconductor devices and methods of forming the same'20169,337,109'Multi-threshold voltage FETs'20169,252,237'Transistors, semiconductor devices, and methods of manufacture thereof'20169,048,122'FinFET drive strength modification'20158,994,112'Fin field effect transistor (finFET)'20158,916,927'Vertical tunnel field effect transistor (FET)'20148,823,102'Device with a strained Fin'20148,802,531'Split-channel transistor and methods for forming the same'20148,779,527'FinFET drive strength modification'20148,766,364'Fin field effect transistor layout for stress optimization'20148,604,518'Split-channel transistor and methods for forming the same'20138,471,329'Tunnel FET and methods for forming the same'20138,283,231'finFET drive strength modification'20128,148,052'Double patterning for lithography to increase feature spatial density'20127,919,364'Semiconductor devices and methods of manufacture thereof'20117,838,371'Method of manufacturing a FET gate'20107,839,209'Tunnel field effect transistor'20107,791,128'Double gate non-volatile memory device and method of manufacturing'2010Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2010–2012Patents assigned to NXP BV (5)· patent assignee history
2010–2021Based in Kessel-Lo, BE· patent location history
2010Based in Heverlee, BE· patent location history
2012–2016Patents assigned to TAIWAN SEMICONDUCTOR MFG (12)· patent assignee history
2012–2017Patents assigned to DOORNBOS GERBEN (10)· patent assignee history
2012–2021Based in Leuven, BE· patent location history
2013–2017Patents assigned to PASSLACK MATTHIAS (4)· patent assignee history
2015–2021Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (48)· patent assignee history
2015Based in Redhill, GB· patent location history
2017–2020Based in Hsinchu, TW· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TAIWAN SEMICONDUCTOR MFG CO LTD | 48 | 2015–2021 |
| TAIWAN SEMICONDUCTOR MFG | 12 | 2012–2016 |
| DOORNBOS GERBENself | 10 | 2012–2017 |
| NXP BV | 5 | 2010–2012 |
| PASSLACK MATTHIAS | 4 | 2013–2017 |
Locations
| Location | Patents | Span |
|---|---|---|
| Leuven, BE | 39 | 2012–2021 |
| Kessel-Lo, BE | 20 | 2010–2021 |
| Hsinchu, TW | 3 | 2017–2020 |
| Heverlee, BE | 2 | 2010 |
| Redhill, GB | 1 | 2015 |