Inventor

Steven M. Partlow

Inventor
Beacon, NY, US

Overview

33→
Patents
2014–2021
Patent span
Physics
Primary field (CPC G)

Patents· 33 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary
G06FElectric digital data processing94%
H04LTransmission of digital information, e.g. telegraphic communication3%
H05KPrinted circuits3%
PatentTitleYear
11,074,195Access to dynamic address translation across multiple spaces for operational context subspaces202111,048,618Environment modification for software application testing202110,990,510Associating attribute seeds of regression test cases with breakpoint value-based fingerprints202110,970,224Operational context subspaces202110,970,197Breakpoint value-based version control202110,963,366Regression test fingerprints based on breakpoint values202110,891,238Dynamically joining and splitting dynamic address translation (DAT) tables based on operational context202110,705,983Transparent conversion of common virtual storage202010,565,114Reducing cache thrashing for counts in hot cache lines202010,552,326Reducing cache thrashing for counts in hot cache lines202010,528,477Pseudo-invalidating dynamic address translation (DAT) tables of a DAT structure associated with a workload202010,254,962Asynchronously clearing page frames201910,061,518Available frame queue processing201810,031,694Asynchronously clearing page frames20189,996,455Virtual storage address threshold for freemained frames20189,983,986Testing code response to injected processing errors20189,898,198'Available frame queue processing'20189,886,373'Testing code response to injected processing errors'20189,864,680'Virtual storage address threshold for freemained frames'20189,715,350'Reserving a storage area and building page frame table entries'20179,690,483'Asynchronously clearing page frames'20179,684,585'Testing code response to injected processing errors'20179,658,792'Reserving a storage area and building page frame table entries'20179,594,509'Virtual storage address threshold for freemained frames'20179,588,802'Asynchronously clearing page frames'20179,542,301'Testing code response to injected processing errors'20179,483,394'Reserving a storage area and building page frame table entries'20169,471,481'Virtual storage address threshold for freemained frames'20169,229,724'Serializing wrapping trace buffer via a compare-and-swap instruction'20168,918,617'Defragmentation of storage class memory managed in extents'20148,688,946'Selecting an auxiliary storage medium for writing data of real storage pages'20148,683,169'Selecting an auxiliary storage medium for writing data of real storage pages'20148,656,133'Managing storage extents and the obtaining of storage blocks within the extents'2014

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2014–2021Patents assigned to IBM (33)· patent assignee history
2014Patents assigned to FOSTER ALFRED F (4)· patent assignee history
2014Patents assigned to MARI CHARLES E (4)· patent assignee history
2014Patents assigned to MILLER JR ROBERT (4)· patent assignee history
2014Patents assigned to MORGENSTERN HARRIS M (4)· patent assignee history
2014–2021Based in Beacon, NY, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
IBM332014–2021
FOSTER ALFRED F42014
MARI CHARLES E42014
MILLER JR ROBERT42014
MORGENSTERN HARRIS M42014
Locations
LocationPatentsSpan
Beacon, New York, US332014–2021