Inventor
Sara Choi
Inventor
Seoul, KR
Overview
Patents· 5 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G11Cprimary
G11CStatic stores25%
G06FElectric digital data processing17%
H01LSemiconductor devices17%
H03MCoding17%
H10NElectric solid-state devices not otherwise provided for17%
H10BElectronic memory devices8%
PatentTitleYear
10,290,340Offset-canceling (OC) write operation sensing circuits for sensing switching in a magneto-resistive random access memory (MRAM) bit cell in an MRAM for a write operation201910,263,645Error correction and decoding201910,224,087Sensing voltage based on a supply voltage applied to magneto-resistive random access memory (MRAM) bit cells in an MRAM for tracking write operations to the MRAM bit cells20199,800,271'Error correction and decoding'20179,502,088'Constant sensing current for reading resistive memory'2016Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2016–2019Patents assigned to QUALCOMM INC (4)· patent assignee history
2016–2019Based in Seoul, KR· patent location history
2017Patents assigned to INDUSTRY-ACADEMIC COOPERATION FOUNDATION YONSEI UNIV (1)· patent assignee history
2019Patents assigned to QUALCOMM TECH INCORPORATED (2)· patent assignee history
2019Patents assigned to YONSEI UNIV UNIV INDUSTRY FOUNDATION (2)· patent assignee history
2019Patents assigned to IND ACADEMIC COOPERATION FOUNDATION YONSEI UNI (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| QUALCOMM INC | 4 | 2016–2019 |
| QUALCOMM TECH INCORPORATED | 2 | 2019 |
| YONSEI UNIV UNIV INDUSTRY FOUNDATION | 2 | 2019 |
| IND ACADEMIC COOPERATION FOUNDATION YONSEI UNI | 1 | 2019 |
| INDUSTRY-ACADEMIC COOPERATION FOUNDATION YONSEI UNIV | 1 | 2017 |
Locations
| Location | Patents | Span |
|---|---|---|
| Seoul, KR | 5 | 2016–2019 |