Inventor
Tzong-Sheng Chang
Inventor
Jhubei City, TW
Overview
Patents· 31 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices27%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1021%
H01LSemiconductor devices18%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1018%
G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices6%
H10BElectronic memory devices6%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests2%
G06FElectric digital data processing1%
PatentTitleYear
10,763,305Semiconductor structure with data storage structure202010,629,481Method for forming interconnect structure202010,534,272Method of fabricating reticle202010,515,902Back-end-of-line (BEOL) arrangement with multi-height interlayer dielectric (ILD) structures201910,090,360Method of manufacturing a semiconductor structure including a plurality of trenches201810,073,354Exposure method of wafer substrate, manufacturing method of semiconductor device, and exposure tool20189,870,998'Semiconductor arrangement having an overlay alignment mark with a height shorter than a neighboring gate structure'20189,831,130Method for forming semiconductor device structure20179,716,034'Method for forming interconnect structure'20179,679,818'Semiconductor device structure and method for forming the same'20179,508,590'Methods and apparatus of metal gate transistors'20169,252,259'Methods and apparatus of metal gate transistors'20169,190,319'Method for forming interconnect structure'20159,178,066'Methods for forming a semiconductor arrangement with structures having different heights'20159,122,828'Apparatus and method for designing an integrated circuit layout having a plurality of cell technologies'20158,860,151'Semiconductor device having a spacer and a liner overlying a sidewall of a gate structure and method of forming the same'20148,741,726'Reacted layer for improving thickness uniformity of strained structures'20147,998,772'Method to reduce leakage in a protection diode structure'20117,663,164'Semiconductor device with reduced leakage protection diode'20107,015,129'Bond pad scheme for Cu process'20066,844,626'Bond pad scheme for Cu process'20056,348,389'Method of forming and etching a resist protect oxide layer including end-point etch'20026,346,449'Non-distort spacer profile during subsequent processing'20026,294,448'Method to improve TiSix salicide formation'20016,284,611'Method for salicide process using a titanium nitride barrier layer'20016,191,018'Method for selective resistivity adjustment of polycide lines for enhanced design flexibility and improved space utilization in sub-micron integrated circuits'20016,004,841'Fabrication process for MOSFET devices and a reproducible capacitor structure'19996,004,829'Method of increasing end point detection capability of reactive ion etching by adding pad area'19995,817,562'Method for making improved polysilicon FET gate electrode structures and sidewall spacers for more reliable self-aligned contacts (SAC)'19985,807,786'Method of making a barrier layer to protect programmable antifuse structure from damage during fabrication sequence'19985,792,681'Fabrication process for MOSFET devices and a reproducible capacitor structure'1998Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1998–2016Patents assigned to TAIWAN SEMICONDUCTOR MFG (19)· patent assignee history
1998–2002Based in Changhua County, TW· patent location history
2005–2017Based in Hsinchu, TW· patent location history
2014Patents assigned to CHANG TZONG-SHENG (1)· patent assignee history
2014Patents assigned to LIN CHENG-TE (1)· patent assignee history
2014–2020Based in Jhubei City, TW· patent location history
2015–2020Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (12)· patent assignee history
2016Patents assigned to TAIWAN SEMICONDUCTOR MANUFACTRING COMPANY LTD (1)· patent assignee history
2020Based in Hsinchu County, TW· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TAIWAN SEMICONDUCTOR MFG | 19 | 1998–2016 |
| TAIWAN SEMICONDUCTOR MFG CO LTD | 12 | 2015–2020 |
| CHANG TZONG-SHENGself | 1 | 2014 |
| LIN CHENG-TE | 1 | 2014 |
| TAIWAN SEMICONDUCTOR MANUFACTRING COMPANY LTD | 1 | 2016 |
Locations
| Location | Patents | Span |
|---|---|---|
| Jhubei City, TW | 14 | 2014–2020 |
| Changhua County, TW | 10 | 1998–2002 |
| Hsinchu, TW | 5 | 2005–2017 |
| Hsinchu County, TW | 2 | 2020 |