Inventor
Chen-Yong Cher
Inventor
Port Chester, NY, US
Overview
Patents· 46 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing56%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use19%
H04LTransmission of digital information, e.g. telegraphic communication11%
G01RMeasuring electric variables7%
G01KMeasuring temperature3%
G11CStatic stores1%
H03MCoding1%
Y02BClimate change mitigation technologies related to buildings, e.g. housing, house appliances or related end-user applications1%
PatentTitleYear
11,121,951Network resiliency through memory health monitoring and proactive management202110,948,955Chip transient temperature predictor202110,896,146Reliability-aware runtime optimal processor configuration202110,746,785Dynamic predictor of semiconductor lifetime limits202010,635,490Optimization of application workflow in mobile embedded devices202010,585,753Checkpoint triggering in a computer system202010,545,839Checkpointing using compute node health information202010,528,097Chip transient temperature predictor202010,365,702Autonomic supply voltage compensation for degradation of circuits over circuit lifetime201910,141,955Method and apparatus for selective and power-aware memory error protection and memory management201810,089,181Checkpoint triggering in a computer system201810,073,739Methods, apparatus and system for selective duplication of subtasks20189,971,713Multi-petascale highly efficient parallel supercomputer20189,863,994'On-chip leakage measurement'20189,825,827'Network resiliency through memory health monitoring and proactive management'20179,690,555'Optimization of application workflow in mobile embedded devices'20179,594,558'Silent store detection and recording in memory storage'20179,588,768'Silent store detection and recording in memory storage'20179,588,767'Silent store detection and recording in memory storage'20179,535,774'Methods, apparatus and system for notification of predictable memory failure'20179,529,653'Processor register error correction management'20169,448,798'Silent store detection and recording in memory storage'20169,436,552'Checkpoint triggering in a computer system'20169,417,882'Load synchronization with streaming thread cohorts'20169,317,350'Method and apparatus for faulty memory utilization'20169,298,553'Methods, apparatus and system for selective duplication of subtasks'20169,280,383'Checkpointing for a hybrid computing node'20169,251,340'Malicious activity detection of a processing thread'20169,218,488'Malicious activity detection of a processing thread'20159,172,714'Malicious activity detection of a functional unit'20159,088,597'Malicious activity detection of a functional unit'20159,081,501'Multi-petascale highly efficient parallel supercomputer'20158,892,921'Power management for systems on a chip'20148,738,859'Hybrid caching techniques and garbage collection using hybrid caching techniques'20148,639,955'Method and system for controlling power in a chip through a power performance monitor and control unit'20148,571,847'Efficiency of static core turn-off in a system-on-a-chip with variation'20138,549,363'Reliability and performance of a system-on-a-chip by predictive wear-out based activation of functional components'20138,542,030'Three-dimensional (3D) stacked integrated circuit testing'20138,489,217'Thermal cycling and gradient management in three-dimensional stacked architectures'20138,312,305'Power management for systems on a chip'20128,312,219'Hybrid caching techniques and garbage collection using hybrid caching techniques'20128,112,642'Method and system for controlling power in a chip through a power-performance monitor and control unit'20127,930,578'Method and system of peak power enforcement via autonomous token-based control and management'20117,886,172'Method of virtualization and OS-level thermal management and multithreaded processor with virtualization and OS-level thermal management'20117,627,742'Method and apparatus for conserving power by throttling instruction fetching when a processor encounters low confidence branches in an information handling system'20097,421,601'Method and system for controlling power in a chip through a power-performance monitor and control unit'2008Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2008–2021Patents assigned to IBM (43)· patent assignee history
2008–2021Based in Port Chester, NY, US· patent location history
2012–2015Patents assigned to CHER CHEN-YONG (10)· patent assignee history
2012–2018Based in Yorktown Heights, NY, US· patent location history
2013Patents assigned to KURSUN EREN (4)· patent assignee history
2013–2015Patents assigned to COTEUS PAUL W (3)· patent assignee history
2013–2015Patents assigned to GARA ALAN (3)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 43 | 2008–2021 |
| CHER CHEN-YONGself | 10 | 2012–2015 |
| KURSUN EREN | 4 | 2013 |
| COTEUS PAUL W | 3 | 2013–2015 |
| GARA ALAN | 3 | 2013–2015 |
Locations
| Location | Patents | Span |
|---|---|---|
| Port Chester, New York, US | 42 | 2008–2021 |
| Yorktown Heights, New York, US | 4 | 2012–2018 |