Inventor
Weize Xiong
Inventor
Austin, TX, US
Overview
Patents· 19 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices44%
H10BElectronic memory devices20%
G11CStatic stores12%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests12%
H01LSemiconductor devices5%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h105%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h102%
PatentTitleYear
9,053,966'Integrated circuits with aligned (100) NMOS and (110) PMOS finFET sidewall channels'20158,872,220'Integrated circuits with aligned (100) NMOS and (110) PMOS FinFET sidewall channels'20148,581,317'SOI MuGFETs having single gate electrode level'20138,470,707'Silicide method'20138,410,519'Integrated circuits with aligned (100) NMOS and (110) PMOS FinFET sidewall channels'20138,377,772'CMOS integration method for optimal IO transistor VT'20138,138,035'Method for forming integrated circuits with aligned (100) NMOS and (110) PMOS FinFET sidewall channels'20128,114,727'Disposable spacer integration with stress memorization technique and silicon-germanium'20128,067,792'Memory device with memory cell including MuGFET and FIN capacitor'20118,043,947'Method to eliminate re-crystallization border defects generated during solid phase epitaxy of a DSB substrate'20117,960,234'Multiple-gate MOSFET device and associated manufacturing methods'20117,939,393'Method of adjusting FDSOI threshold voltage through oxide charges generation in the buried oxide'20117,897,994'Method of making (100) NMOS and (110) PMOS sidewall surface on the same fin orientation for multiple gate MOSFET with DSB substrate'20117,683,417'Memory device with memory cell including MuGFET and fin capacitor'20107,638,843'Integrating high performance and low power multi-gate devices'20097,582,521'Dual metal gates for mugfet device'20097,253,043'Short channel semiconductor device fabrication'20077,238,567'System and method for integrating low schottky barrier metal source/drain'20077,094,650'Gate electrode for FinFET device'2006Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2006–2015Patents assigned to TEXAS INSTRUMENTS INC (19)· patent assignee history
2006–2015Based in Austin, TX, US· patent location history
2011–2013Patents assigned to XIONG WEIZE (7)· patent assignee history
2011–2013Patents assigned to MARSHALL ANDREW (2)· patent assignee history
2011–2013Based in Plano, TX, US· patent location history
2012–2013Patents assigned to CLEAVELIN CLOVES RINN (3)· patent assignee history
2012–2013Patents assigned to PINTO ANGELO (2)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TEXAS INSTRUMENTS INC | 19 | 2006–2015 |
| XIONG WEIZEself | 7 | 2011–2013 |
| CLEAVELIN CLOVES RINN | 3 | 2012–2013 |
| MARSHALL ANDREW | 2 | 2011–2013 |
| PINTO ANGELO | 2 | 2012–2013 |
Locations
| Location | Patents | Span |
|---|---|---|
| Austin, Texas, US | 14 | 2006–2015 |
| Plano, Texas, US | 5 | 2011–2013 |