Inventor
Shishir Kumar
Inventor
Greater Noida, IN
Overview
Patents· 18 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G11Cprimary
G11CStatic stores44%
G06FElectric digital data processing22%
G06NComputing arrangements based on specific computational models11%
H01LSemiconductor devices4%
H03KPulse technique4%
H04LTransmission of digital information, e.g. telegraphic communication4%
H10BElectronic memory devices4%
H10DInorganic electric semiconductor devices4%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests4%
PatentTitleYear
11,126,420Component firmware update from baseboard management controller202111,122,130Method to create and perform appropriate workflow for datacenter migration202110,706,915Method and circuit for adaptive read-write operation in self-timed memory202010,311,944SRAM read multiplexer including replica transistors201910,283,191Method and circuit for adaptive read-write operation in self-timed memory201910,191,902Method and unit for building semantic rule for a semantic data201910,073,838Method and system for enabling verifiable semantic rule building for semantic data201810,037,794SRAM read multiplexer including replica transistors20189,910,880'System and method for managing enterprise user group'20189,898,527'Methods for retrieving information and devices thereof'20189,590,602'System and method for a pulse generator'20179,324,414'Selective dual cycle write operation for a self-timed memory'20169,165,642'Low voltage dual supply memory cell with two word lines and activation circuitry'20159,147,453'Programmable delay introducing circuit in self timed memory'20159,006,841'Dual port SRAM having reduced cell size and rectangular shape'20158,963,053'Programmable delay introducing circuit in self-timed memory'20158,138,455'Programmable delay introducing circuit in self timed memory'20127,545,180'Sense amplifier providing low capacitance with reduced resolution time'2009Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2009–2015Patents assigned to ST MICROELECTRONICS PVT LTD (3)· patent assignee history
2012–2018Patents assigned to KUMAR SHISHIR (4)· patent assignee history
2012–2015Patents assigned to BHARGAVA MUDIT (2)· patent assignee history
2015–2020Patents assigned to ST MICROELECTRONICS INT NV (9)· patent assignee history
2015–2020Based in Greater Noida, IN· patent location history
2015Based in Uttar Pradesh, IN· patent location history
2015Based in Distt-Gorakhpur, IN· patent location history
2018–2019Patents assigned to WIPRO LTD (4)· patent assignee history
2018–2019Based in Patna, IN· patent location history
2021Based in Vellore, IN· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| ST MICROELECTRONICS INT NV | 9 | 2015–2020 |
| KUMAR SHISHIRself | 4 | 2012–2018 |
| WIPRO LTD | 4 | 2018–2019 |
| ST MICROELECTRONICS PVT LTD | 3 | 2009–2015 |
| BHARGAVA MUDIT | 2 | 2012–2015 |
Locations
| Location | Patents | Span |
|---|---|---|
| Greater Noida, IN | 8 | 2015–2020 |
| Patna, IN | 4 | 2018–2019 |
| Vellore, IN | 2 | 2021 |
| Uttar Pradesh, IN | 1 | 2015 |
| Distt-Gorakhpur, IN | 1 | 2015 |