Inventor
John C. Krause
Inventor
Georgetown, TX, US
Overview
Patents· 21 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H04Lprimary
H04LTransmission of digital information, e.g. telegraphic communication46%
G06FElectric digital data processing31%
G01RMeasuring electric variables17%
H04JMultiplex communication3%
H04MTelephonic communication3%
PatentTitleYear
7,197,100'High-speed interconnection adapter having automated lane de-skew'20077,016,971'Congestion management in a distributed computer system multiplying current variable injection rate with a constant to set new variable injection rate at source node'20066,961,347'High-speed interconnection link having automated lane reordering'20056,882,656'Speculative transmit for system area network latency reduction'20056,870,814'Link extenders with error propagation and reporting'20056,865,231'High-speed interconnection adapter having automated crossed differential pair correction'20056,765,922'Speculative transmit for system area network latency reduction'20046,728,909'Data communication with speculative reception of data in a data processing system'20046,690,757'High-speed interconnection adapter having automated lane de-skew'20046,249,756'Hybrid flow control'20016,175,882'Network system for a first module port auto configuring same mode as a second module port'20016,157,967'Method of data communication flow control in a data processing system using busy/ready commands'20006,151,689'Detecting and isolating errors occurring in data communication in a multiple processor system'20005,914,953'Network message routing using routing table information and supplemental enable information for deadlock prevention'19995,867,501'Encoding for communicating data and commands'19995,790,776'Apparatus for detecting divergence between a pair of duplexed, synchronized processor elements'19985,751,955'Method of synchronizing a pair of central processor units for duplex, lock-step operation by copying data into a corresponding locations of another memory'19985,751,932'Fail-fast, fail-functional, fault-tolerant multiprocessor system'19985,694,121'Latency reduction and routing arbitration for network message routers'19975,631,955'Option bus'19975,574,849'Synchronized data transmission between elements of a processing system'1996Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1996–2001Patents assigned to TANDEM COMPUTERS INC (9)· patent assignee history
1996–2007Based in Georgetown, TX, US· patent location history
1997Patents assigned to ROLM SYSTEMS (1)· patent assignee history
1997Based in Austin, TX, US· patent location history
2001Patents assigned to COMPAQ COMPUTER CORP (1)· patent assignee history
2004–2007Patents assigned to HEWLETT PACKARD DEVELOPMENT CO (8)· patent assignee history
2006Patents assigned to ADAPTEC INC (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TANDEM COMPUTERS INC | 9 | 1996–2001 |
| HEWLETT PACKARD DEVELOPMENT CO | 8 | 2004–2007 |
| ADAPTEC INC | 1 | 2006 |
| COMPAQ COMPUTER CORP | 1 | 2001 |
| ROLM SYSTEMS | 1 | 1997 |
Locations
| Location | Patents | Span |
|---|---|---|
| Georgetown, Texas, US | 19 | 1996–2007 |
| Austin, Texas, US | 2 | 1997 |