Inventor
Chao-Fu Weng
Inventor
Tainan, TW
Overview
Patents· 33 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1060%
H05KPrinted circuits12%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1010%
B23KSoldering or unsoldering8%
C25FProcesses for the electrolytic removal of materials from objects4%
C23FNon-mechanical removal of metallic material from surface2%
H01LSemiconductor devices2%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests2%
Y10TTechnical subjects covered by former us classification2%
PatentTitleYear
9,955,590Redistribution layer structure, semiconductor substrate structure, semiconductor package structure, chip structure, and method of manufacturing the same20188,431,007'Electro-thinning apparatus for removing excess metal from surface metal layer of substrate and removing method using the same'20138,288,854'Semiconductor package and method for making the same'20127,581,666'Wire-bonding method for wire-bonding apparatus'20097,547,575'Two-stage die-bonding method for simultaneous die-bonding of multiple dies'20097,445,944'Packaging substrate and manufacturing method thereof'20087,261,828'Bumping process'20077,253,519'Chip packaging structure having redistribution layer with recess'20077,144,801'Bumping process to increase bump height'20067,064,428'Wafer-level package structure'20067,015,130'Method for making UBM pads and bumps on wafer'20066,989,326'Bump manufacturing method'20066,967,153'Bump fabrication process'20056,927,964'Structure for preventing burnt fuse pad from further electrical connection'20056,921,716'Wafer bumping process'20056,877,653'Method of modifying tin to lead ratio in tin-lead bump'20056,875,683'Method of forming bump'20056,867,122'Redistribution process'20056,861,346'Solder ball fabricating process'20056,846,719'Process for fabricating wafer bumps'20056,827,252'Bump manufacturing method'20046,812,124'Chip structure with bumps and a process for fabricating the same'20046,756,256'Method for preventing burnt fuse pad from further electrical connection'20046,743,707'Bump fabrication process'20046,732,912'Solder ball attaching process'20046,723,630'Solder ball fabrication process'20046,720,244'Bump fabrication method'20046,720,243'Bump fabrication method'20046,716,739'Bump manufacturing method'20046,713,320'Bumping process'20046,673,711'Solder ball fabricating process'20046,664,128'Bump fabrication process'20036,617,237'Lead-free bump fabrication process'2003Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2003–2018Patents assigned to ADVANCED SEMICONDUCTOR ENG (32)· patent assignee history
2003–2013Based in Tainan, TW· patent location history
2008Patents assigned to ASE SHANGHAI INC (1)· patent assignee history
2012–2013Patents assigned to WENG CHAO-FU (2)· patent assignee history
2012Patents assigned to WU YI-TING (1)· patent assignee history
2012–2018Based in Kaohsiung, TW· patent location history
2013Patents assigned to TARNG SHIN-LUH (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| ADVANCED SEMICONDUCTOR ENG | 32 | 2003–2018 |
| WENG CHAO-FUself | 2 | 2012–2013 |
| ASE SHANGHAI INC | 1 | 2008 |
| TARNG SHIN-LUH | 1 | 2013 |
| WU YI-TING | 1 | 2012 |
Locations
| Location | Patents | Span |
|---|---|---|
| Tainan, TW | 31 | 2003–2013 |
| Kaohsiung, TW | 2 | 2012–2018 |