Inventor

Anmol Mathur

Inventor

San Jose, CA, US

Overview

2004–2020

Patent span

Physics

Primary field (CPC G)

Patents· 14 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary

G06FElectric digital data processing88%

G11CStatic stores13%

PatentTitleYear

10,534,723System, method, and computer program product for conditionally eliminating a memory read request2020 9,720,859'System, method, and computer program product for conditionally eliminating a memory read request'2017 8,122,401'System, method, and computer program product for determining equivalence of netlists utilizing at least one transformation'2012 8,117,571'System, method, and computer program product for determining equivalence of netlists utilizing abstractions and transformations'2012 7,966,593'Integrated circuit design system, method, and computer program product that takes into account the stability of various design signals'2011 7,761,827'Integrated circuit design system, method, and computer program product that takes into account observability based clock gating conditions'2010 7,673,257'System, method and computer program product for word-level operator-to-cell mapping'2010 7,350,168'System, method and computer program product for equivalence checking between designs with sequential differences'2008 7,284,218'Method and system for inplace symbolic simulation over multiple cycles of a multi-clock domain design'2007 7,222,317'Circuit comparison by information loss matching'2007 6,832,357'Reducing datapath widths by rebalancing data flow topology'2004 6,807,651'Procedure for optimizing mergeability and datapath widths of data flow graphs'2004 6,772,399'Enhancing mergeability of datapaths and reducing datapath widths responsively to required precision'2004 6,772,398'Reducing datapath widths responsively to upper bound on information content'2004

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2004Patents assigned to CADENCE DESIGN SYSTEMS INC (4)· patent assignee history

2004–2020Based in San Jose, CA, US· patent location history

2007–2012Patents assigned to CALYPTO DESIGN SYSTEMS INC (7)· patent assignee history

2012–2017Patents assigned to MATHUR ANMOL (3)· patent assignee history

2012Patents assigned to CHAUHAN PANKAJ P (2)· patent assignee history

2012Patents assigned to GOYAL DEEPAK (2)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
CALYPTO DESIGN SYSTEMS INC	7	2007–2012
CADENCE DESIGN SYSTEMS INC	4	2004
MATHUR ANMOLself	3	2012–2017
CHAUHAN PANKAJ P	2	2012
GOYAL DEEPAK	2	2012

Locations

Location	Patents	Span
San Jose, California, US	14	2004–2020