Inventor
Robert Fu
Inventor
Cupertino, CA, US
Overview
Patents· 21 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H03Kprimary
H03KPulse technique41%
H10DInorganic electric semiconductor devices18%
G11CStatic stores12%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h109%
G05FSystems for regulating electric or magnetic variables6%
G06FElectric digital data processing6%
H01LSemiconductor devices3%
H02MApparatus for conversion between ac and ac, between ac and dc, or between dc and dc, and for use with mains or similar power supply systems3%
H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses3%
PatentTitleYear
10,284,185Selectively providing clock signals using a programmable control circuit20199,871,520'Voting circuit and self-correcting latches'20189,825,632'Circuit for and method of preventing multi-bit upsets induced by single event transients'20179,509,307'Interconnect multiplexers and methods of reducing contention currents in an interconnect multiplexer'20169,251,865'Selective coupling of voltage feeds for body bias voltage in an integrated circuit device'20168,866,509'Flip-flop array with option to ignore control signals'20148,461,891'Voltage compensated integrated circuits'20138,415,730'Selective coupling of voltage feeds for body bias voltage in an integrated circuit device'20138,350,616'Variable output charge pump circuit'20138,085,084'System for substrate potential regulation during power-up in integrated circuits'20118,022,747'System for substrate potential regulation during power-up in integrated circuits'20117,719,344'Stabilization component for a substrate potential regulation circuit'20107,642,835'System for substrate potential regulation during power-up in integrated circuits'20107,600,204'Method for simulation of negative bias and temperature instability'20097,495,497'Temperature compensated integrated circuits'20097,332,763'Selective coupling of voltage feeds for body bias voltage in an integrated circuit device'20087,329,928'Voltage compensated integrated circuits'20087,012,461'Stabilization component for a substrate potential regulation circuit'20066,930,534'Temperature compensated integrated circuits'20056,831,494'Voltage compensated integrated circuits'20046,426,649'Architecture for field programmable gate array'2002Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2002–2016Based in Cupertino, CA, US· patent location history
2004–2009Patents assigned to TRANSMETA CORP (6)· patent assignee history
2009–2019Patents assigned to XILINX INC (6)· patent assignee history
2009–2019Based in Saratoga, CA, US· patent location history
2010–2016Patents assigned to FU ROBERT (8)· patent assignee history
2010–2013Patents assigned to CHEN TIEN-MIN (5)· patent assignee history
2013–2016Patents assigned to BURR JAMES B (3)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| FU ROBERTself | 8 | 2010–2016 |
| TRANSMETA CORP | 6 | 2004–2009 |
| XILINX INC | 6 | 2009–2019 |
| CHEN TIEN-MIN | 5 | 2010–2013 |
| BURR JAMES B | 3 | 2013–2016 |
Locations
| Location | Patents | Span |
|---|---|---|
| Cupertino, California, US | 15 | 2002–2016 |
| Saratoga, California, US | 6 | 2009–2019 |