Inventor
Emmanuel Augendre
Inventor
Montbonnot, FR
Overview
Patents· 26 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices32%
H01LSemiconductor devices29%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1024%
B82YSpecific uses or applications of nanostructures8%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h105%
H10BElectronic memory devices1%
PatentTitleYear
10,978,594Transistor comprising a channel placed under shear strain and fabrication process202110,818,775Method for fabricating a field-effect transistor202010,727,320Method of manufacturing at least one field effect transistor having epitaxially grown electrodes202010,714,392Optimizing junctions of gate all around structures with channel pull back202010,665,497Method of manufacturing a structure having one or several strained semiconducting zones that may for transistor channel regions202010,600,786Method for fabricating a device with a tensile-strained NMOS transistor and a uniaxial compression strained PMOS transistor202010,431,683Method for making a semiconductor device with a compressive stressed channel201910,269,930Method for producing a semiconductor device with self-aligned internal spacers201910,256,102Method for fabricating a field effect transistor having a surrounding grid201910,217,842Method for making a semiconductor device with self-aligned inner spacers201910,217,849Method for making a semiconductor device with nanowire and aligned external and internal spacers201910,147,788Process for fabricating a field effect transistor having a coating gate201810,141,424Method of producing a channel structure formed from a plurality of strained semiconductor bars201810,134,875Method for fabricating a transistor having a vertical channel having nano layers201810,109,735Process for fabricating a field effect transistor having a coating gate201810,096,694Process for fabricating a vertical-channel nanolayer transistor20189,997,394Method for transferring a thin layer with supply of heat energy to a fragile zone via an inductive layer20189,917,153'Method for producing a microelectronic device'20189,853,130Method of modifying the strain state of a semiconducting structure with stacked transistor channels20179,853,124Method for fabricating a nanowire semiconductor transistor having an auto-aligned gate and spacers20179,704,709'Method for causing tensile strain in a semiconductor film'20179,536,951'FinFET transistor comprising portions of SiGe with a crystal orientation [111]'20178,853,785'Integrated circuit with electrostatically coupled MOS transistors and method for producing such an integrated circuit'20148,809,964'Method of adjusting the threshold voltage of a transistor by a buried trapping layer'20147,879,690'Method of fabricating a microelectronic structure of a semiconductor on insulator type with different patterns'20116,855,605'Semiconductor device with selectable gate thickness and method of manufacturing such devices'2005Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2005Based in Leuven, BE· patent location history
2011–2021Patents assigned to COMMISSARIAT ENERGIE ATOMIQUE (25)· patent assignee history
2011–2021Based in Montbonnot, FR· patent location history
2014Patents assigned to AUGENDRE EMMANUEL (2)· patent assignee history
2014Patents assigned to CLAVELIER LAURENT (2)· patent assignee history
2018–2020Patents assigned to IBM (5)· patent assignee history
2020Patents assigned to ST MICROELECTRONICS INC (2)· patent assignee history
2020Based in Le Sappey en Chartreuse, FR· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| COMMISSARIAT ENERGIE ATOMIQUE | 25 | 2011–2021 |
| IBM | 5 | 2018–2020 |
| AUGENDRE EMMANUELself | 2 | 2014 |
| CLAVELIER LAURENT | 2 | 2014 |
| ST MICROELECTRONICS INC | 2 | 2020 |
Locations
| Location | Patents | Span |
|---|---|---|
| Montbonnot, FR | 24 | 2011–2021 |
| Le Sappey en Chartreuse, FR | 1 | 2020 |
| Leuven, BE | 1 | 2005 |