Inventor
Chul-Sung Park
Inventor
Seoul, KR
Overview
Patents· 43 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G11Cprimary
G11CStatic stores41%
G06FElectric digital data processing17%
H03KPulse technique9%
G01RMeasuring electric variables5%
G11BInformation storage based on relative movement between record carrier and transducer5%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h105%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h105%
H01LSemiconductor devices3%
F16LPipes2%
G01KMeasuring temperature2%
PatentTitleYear
10,409,331Cover glass for electronic device201910,365,689Transparent cover for electronic device201910,318,469Semiconductor memory device, memory system, and method using bus-invert encoding201910,115,702Semiconductor chip for sensing temperature and semiconductor system including the same201810,067,681Memory chip, memory system, and method of accessing the memory chip20189,830,083Memory chip, memory system, and method of accessing the memory chip20179,658,738'Representation management on an electronic device'20179,588,840'Memory devices that perform masked write operations and methods of operating the same'20179,455,217'Semiconductor package including multiple chips and separate groups of leads'20169,436,545'Semiconducotr memory device including non-volatile memory cell array'20169,412,429'Memory device with multiple voltage generators'20169,164,834'Semiconductor memory devices, memory systems including the same and method of writing data in the same'20159,147,465'Circuit for controlling sense amplifier source node in semiconductor memory device and controlling method thereof'20159,135,981'Memory system having memory ranks and related tuning method'20159,076,548'Semiconductor memory device including refresh control circuit and method of refreshing the same'20159,047,929'Memory system having memory ranks and related tuning method'20158,638,626'Row address control circuit semiconductor memory device including the same and method of controlling row address'20147,902,871'Level shifter and semiconductor device having off-chip driver'20117,616,532'Optical disc drive'20097,548,485'Semiconductor memory device capable of synchronous/asynchronous operation and data input/output method thereof'20097,499,310'Bit line voltage supply circuit in semiconductor memory device and voltage supplying method therefor'20097,379,355'Circuit for enabling sense amplifier and semiconductor memory device having the same'20087,362,128'Programmable impedance control circuit in semiconductor device and impedance range shifting method thereof'20087,340,560'Methods and devices for accessing a memory using multiple separate address mapped temporary storage areas'20087,327,630'Memory cell power switching circuit in semiconductor memory device and method for applying memory cell power voltage'20087,288,966'Programmable impedance controller and method for operating'20077,203,024'Method of testing servo burst signals of hard disk drive and recording medium adapted therefor'20077,151,710'Semiconductor memory device with data input/output organization in multiples of nine bits'20067,145,743'Apparatus and method for unlatching a head within a data storage device'20067,105,917'Semiconductor device having a fuse connected to a pad and fabrication method thereof'20067,068,058'Semiconductor integrated circuit device with test element group circuit'20066,958,947'Semiconductor memory device with internal voltage generators for testing a memory array and peripheral circuits'20056,949,960'Semiconductor integrated circuit comprising functional modes'20056,909,661'Semiconductor memory device with data input/output organization in multiples of nine bits'20056,836,441'Apparatus of repairing memory cell and method therefor'20046,822,330'Semiconductor integrated circuit device with test element group circuit'20046,747,885'Ternary content addressable memory device'20046,693,831'Apparatus of repairing memory cell and method therefor'20046,678,193'Apparatus and method for tracking between data and echo clock'20045,835,400'Ferroelectric memory devices having nondestructive read capability and methods of operating same'19985,805,012'Systems and methods for compensating a buffer for power supply fluctuation'19985,576,639'BICMOS level shifter of a semiconductor integrated circuit and data output buffer using the same'19965,472,889'Method of manufacturing large-sized thin film transistor liquid crystal display panel'1995Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1996–2019Patents assigned to SAMSUNG ELECTRONICS CO LTD (38)· patent assignee history
1998–2019Based in Seoul, KR· patent location history
2006–2007Based in Suwon-si, KR· patent location history
2009–2014Based in Seocho-gu, KR· patent location history
2014–2017Patents assigned to PARK CHUL-SUNG (4)· patent assignee history
2015–2017Patents assigned to CHUNG HOI-JU (2)· patent assignee history
2015–2017Patents assigned to HAN GONG-HEUM (2)· patent assignee history
2017Based in Mountain View, CA, US· patent location history
2019Patents assigned to ELK CORP (2)· patent assignee history
2019Based in Gyeonggi-do, KR· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| SAMSUNG ELECTRONICS CO LTD | 38 | 1996–2019 |
| PARK CHUL-SUNGself | 4 | 2014–2017 |
| CHUNG HOI-JU | 2 | 2015–2017 |
| ELK CORP | 2 | 2019 |
| HAN GONG-HEUM | 2 | 2015–2017 |
Locations
| Location | Patents | Span |
|---|---|---|
| Seoul, KR | 32 | 1998–2019 |
| Gyeonggi-do, KR | 2 | 2019 |
| Seocho-gu, KR | 2 | 2009–2014 |
| Suwon-si, KR | 2 | 2006–2007 |
| Mountain View, California, US | 1 | 2017 |