Inventor
Wayne H. Huang
Inventor
Boise, ID, US
Overview
Patents· 19 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H01Lprimary
H01LSemiconductor devices31%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1022%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1022%
B08BCleaning in general6%
H10NElectric solid-state devices not otherwise provided for4%
B23HWorking of metal by the action of a high concentration of electric current on a workpiece using an electrode which takes the place of a tool2%
C25FProcesses for the electrolytic removal of materials from objects2%
G05DSystems for controlling or regulating non-electric variables2%
G06FElectric digital data processing2%
G06QInformation and communication technology [ict] specially adapted for administrative, commercial, financial, managerial or supervisory purposes2%
PatentTitleYear
10,902,734Systems and methods for managing flight-restriction regions202110,763,186Package cooling by coil cavity202010,692,733Uniform back side exposure of through-silicon vias202010,410,879Uniform back side exposure of through-silicon vias201910,262,922Semiconductor device having through-silicon-via and methods of forming the same201910,137,481Methods of removing particles from over semiconductor substrates20189,941,190Semiconductor device having through-silicon-via and methods of forming the same20189,837,383Interconnect structure with improved conductive properties and associated systems and methods20179,818,622'Uniform back side exposure of through-silicon vias'20179,780,052'Collars for under-bump metal structures and associated systems and methods'20179,412,675'Interconnect structure with improved conductive properties and associated systems and methods'20169,397,078'Semiconductor device assembly with underfill containment cavity'20169,153,451'Method of forming a planar surface for a semiconductor device structure, and related methods of forming a semiconductor device structure'20158,974,655'Methods of planarization and electro-chemical mechanical polishing processes'20158,956,974'Devices, systems, and methods related to planarizing semiconductor devices after forming openings'20158,940,102'Methods of removing particles from over semiconductor substrates'20158,809,157'Methods of forming a programmable region that comprises a multivalent metal oxide portion and an oxygen containing dielectric portion'20148,633,084'Methods of forming a memory cell having programmable material that comprises a multivalent metal oxide portion and an oxygen containing dielectric portion'20148,226,772'Methods of removing particles from over semiconductor substrates'2012Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2012–2020Patents assigned to MICRON TECHNOLOGY INC (18)· patent assignee history
2012–2015Patents assigned to HUANG WAYNE (3)· patent assignee history
2012–2015Patents assigned to GREELEY NEIL JOSEPH (2)· patent assignee history
2012–2015Patents assigned to MILLWARD DAN (2)· patent assignee history
2012–2020Based in Boise, ID, US· patent location history
2015Patents assigned to HUANG WAYNE H (1)· patent assignee history
2021Based in Shenzhen, CN· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| MICRON TECHNOLOGY INC | 18 | 2012–2020 |
| HUANG WAYNEself | 3 | 2012–2015 |
| GREELEY NEIL JOSEPH | 2 | 2012–2015 |
| MILLWARD DAN | 2 | 2012–2015 |
| HUANG WAYNE Hself | 1 | 2015 |
Locations
| Location | Patents | Span |
|---|---|---|
| Boise, ID, US | 18 | 2012–2020 |
| Shenzhen, CN | 1 | 2021 |