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Inventor

Hirotaka Nishino

Inventor
Yokohama, JP

Overview

19→
Patents
1991–2021
Patent span
Electricity
Primary field (CPC H)

Patents· 19 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Dprimary
H10DInorganic electric semiconductor devices26%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1024%
G06FElectric digital data processing7%
H01LSemiconductor devices7%
H04LTransmission of digital information, e.g. telegraphic communication7%
H10BElectronic memory devices7%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h107%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests5%
C23CCoating metallic material2%
H03DDemodulation or transference of modulation from one carrier to another2%
PatentTitleYear
11,114,531Semiconductor device, method for manufacturing semiconductor device, inverter circuit, driving device, vehicle, and elevator202110,397,139Storage device in which forwarding-function-equipped memory nodes are mutually connected and data processing method201910,249,718Semiconductor device, method for manufacturing semiconductor device, inverter circuit, driving device, vehicle, and elevator201910,044,642Storage device in which forwarding-function-equipped memory nodes are mutually connected and data processing method20189,246,709'Storage device in which forwarding-function-equipped memory nodes are mutually connected and data processing method'20169,083,423'Semiconductor circuit, D/A converter, mixer circuit, radio communication device, method for adjusting threshold voltage, and method for determining quality of transistor'20158,450,208'Semiconductor device manufacturing method'20137,968,933'Nonvolatile semiconductor memory device'20117,863,695'Complementary MISFET semiconductor device having an atomic density ratio aluminum/lanthanum (Al/La) in the gate insulating layer of PMIS is larger than that of the NMIS'20117,767,538'Method for manufacturing semiconductor device'20107,550,801'Nonvolatile semiconductor memory device'20096,933,216'Fine particle film forming apparatus and method and semiconductor device and manufacturing method for the same'20056,538,323'Semiconductor device having an electrode structure comprising a conductive fine particle film'20036,342,421'Semiconductor device and manufacturing method thereof'20026,140,247'Semiconductor device manufacturing method'20006,054,371'Method of manufacturing a semiconductor device by detachably mounting substrates to a holder board'20005,864,161'Semiconductor device and manufacturing method thereof'19995,258,332'Method of manufacturing semiconductor devices including rounding of corner portions by etching'19935,030,319'Method of oxide etching with condensed plasma reaction product'1991

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1991–2021Patents assigned to TOSHIBA KK (17)· patent assignee history
1991–2021Based in Yokohama, JP· patent location history
1993–2013Based in Kanagawa, JP· patent location history
1999–2002Based in Pittsburgh, PA, US· patent location history
2013–2016Patents assigned to KINOSHITA ATSUHIRO (2)· patent assignee history
2013–2016Patents assigned to NISHI YOSHIFUMI (2)· patent assignee history
2013–2016Patents assigned to NISHINO HIROTAKA (2)· patent assignee history
2013–2016Patents assigned to SUZUKI MASAMICHI (2)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
TOSHIBA KK171991–2021
KINOSHITA ATSUHIRO22013–2016
NISHI YOSHIFUMI22013–2016
NISHINO HIROTAKAself22013–2016
SUZUKI MASAMICHI22013–2016
Locations
LocationPatentsSpan
Yokohama, JP141991–2021
Pittsburgh, Pennsylvania, US31999–2002
Kanagawa, JP21993–2013