LexDanaLexDanabeta
Inventor

Jam-Wem Lee

Inventor
Zhubei City, TW

Overview

76→
Patents
2010–2020
Patent span
Electricity
Primary field (CPC H)

Patents· 76 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Dprimary
H10DInorganic electric semiconductor devices40%
H01LSemiconductor devices29%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1013%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h108%
H02HEmergency protective circuit arrangements3%
G11CStatic stores3%
H03KPulse technique2%
H04LTransmission of digital information, e.g. telegraphic communication1%
G06FElectric digital data processing1%
H02MApparatus for conversion between ac and ac, between ac and dc, or between dc and dc, and for use with mains or similar power supply systems1%
PatentTitleYear
10,867,987Integrated circuit device having ESD protection202010,803,967Memory device with a fuse protection circuit202010,777,546Planar and non-planar FET-based electrostatic discharge protection devices202010,777,547ESD protection device202010,643,988Intelligent diode structures202010,643,726Memory device with a fuse protection circuit202010,490,461Double sided NMOS/PMOS structure and methods of forming the same201910,411,005Intelligent diode structures201910,366,992Semiconductor device including transistors sharing gates201910,283,210Memory device with a fuse protection circuit201910,262,990Electrostatic discharge protection device for differential signal devices201910,163,891High voltage ESD protection apparatus201810,134,726Diode string implementation for electrostatic discharge protection201810,109,366Memory device with a fuse protection circuit201810,109,621Low-capacitance electrostatic damage protection device and method of designing and making same201810,083,910Backside contacts for integrated circuit devices20189,978,739Semiconductor arrangement facilitating enhanced thermo-conduction20189,929,143'N-type metal oxide semiconductor (NMOS) transistor for electrostatic discharge (ESD)'20189,887,275'Method of reducing the heights of source-drain sidewall spacers of FinFETs through etching'20189,818,842'Dynamic threshold MOS and methods of forming the same'20179,768,164'Multi-gate high voltage device'20179,754,844'Double sided NMOS/PMOS structure and methods of forming the same'20179,666,575'Semiconductor arrangement facilitating enhanced thermo-conduction'20179,633,910'Backside contacts for integrated circuit devices'20179,601,627'Diode structure compatible with FinFET process'20179,576,949'Diode formed of PMOSFET and schottky diodes'20179,576,945'Methods and apparatus for increased holding voltage in silicon controlled rectifiers for ESD protection'20179,548,367'Method of reducing the heights of source-drain sidewall spacers of FinFETs through etching and the FinFETs thereof'20179,484,338'Diode string implementation for electrostatic discharge protection'20169,449,959'ESD protection circuit cell'20169,437,733'Dynamic threshold MOS and methods of forming the same'20169,385,707'Multi-gate high voltage device'20169,368,629'Diode structure compatible with FinFET process'20169,362,266'Electrostatic discharge protection device for differential signal devices'20169,356,012'High voltage ESD protection apparatus'20169,312,384'FinFET body contact and method of making same'20169,245,878'Bidirectional dual-SCR circuit for ESD protection'20169,230,961'Semiconductor arrangement facilitating enhanced thermo-conduction'20169,224,727'ESD protection apparatus'20159,214,540'N-type metal oxide semiconductor (NMOS) transistor for electrostatic discharge (ESD)'20159,214,398'Backside contacts for integrated circuit devices'20159,209,265'ESD devices comprising semiconductor fins'20159,209,302'Method of reducing the heights of source-drain sidewall spacers of FinFETs through etching'20159,209,168'Circuit with inter-layer vias and intra-layer coupled transistors'20159,177,953'Circular semiconductor device with electrostatic discharge (ESD) device and functional device'20159,165,829'Double sided NMOS/PMOS structure and methods of forming the same'20159,165,926'Dynamic threshold MOS and methods of forming the same'20159,093,492'Diode structure compatible with FinFET process'20159,064,720'Decoupling capacitor for FinFET compatible process'20159,041,078'Three-dimensional integrated circuit with inter-layer vias and intra-layer coupled transistors'20158,963,200'Methods and apparatus for increased holding voltage in silicon controlled rectifiers for ESD protection'20158,937,364'Multi-gate high voltage device'20158,928,093'FinFET body contact and method of making same'20158,906,767'Semiconductor device with self-aligned interconnects'20148,860,168'Schottky isolated NMOS for latch-up prevention'20148,853,825'ESD protection apparatus'20148,841,696'High-trigger current SCR'20148,823,139'Low leakage diodes'20148,809,961'Electrostatic discharge (ESD) guard ring protective structure'20148,759,871'Bidirectional dual-SCR circuit for ESD protection'20148,742,491'FinFET process compatible native transistor'20148,735,993'FinFET body contact and method of making same'20148,610,220'Semiconductor device with self-aligned interconnects'20138,604,582'Schottky diode'20138,598,625'ESD protection device with tunable design windows'20138,587,071'Electrostatic discharge (ESD) guard ring protective structure'20138,570,698'ESD protection for FinFETs'20138,541,848'High-voltage MOSFETs having current diversion region in substrate near fieldplate'20138,476,736'Low leakage diodes'20138,405,943'Circuit and method for power clamp triggered dual SCR ESD protection'20138,400,813'One-time programmable fuse with ultra low programming current'20138,331,068'ESD protection for FinFETs'20128,153,493'FinFET process compatible native transistor'20128,049,250'Circuit and method for power clamp triggered dual SCR ESD protection'20117,964,893'Forming ESD diodes and BJTs using FinFET compatible processes'20117,700,449'Forming ESD diodes and BJTs using FinFET compatible processes'2010

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2010–2016Patents assigned to TAIWAN SEMICONDUCTOR MFG (44)· patent assignee history
2010–2018Based in Zhubei City, TW· patent location history
2012–2017Patents assigned to LEE JAM-WEM (20)· patent assignee history
2013–2016Patents assigned to CHANG YI-FENG (9)· patent assignee history
2013–2017Patents assigned to SONG MING-HSIANG (5)· patent assignee history
2015Based in Jhubei City, TW· patent location history
2016–2020Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (32)· patent assignee history
2016–2019Based in Hsinchu County, TW· patent location history
2016Based in Zhuebei, TW· patent location history
2017–2020Based in Hsinchu, TW· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
TAIWAN SEMICONDUCTOR MFG442010–2016
TAIWAN SEMICONDUCTOR MFG CO LTD322016–2020
LEE JAM-WEMself202012–2017
CHANG YI-FENG92013–2016
SONG MING-HSIANG52013–2017
Locations
LocationPatentsSpan
Zhubei City, TW492010–2018
Hsinchu, TW232017–2020
Hsinchu County, TW22016–2019
Zhuebei, TW12016
Jhubei City, TW12015