Inventor
Kwang Ok Jeong
Inventor
Suwon-si, KR
Overview
Patents· 6 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing17%
H01LSemiconductor devices17%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1017%
H03KPulse technique11%
H10DInorganic electric semiconductor devices11%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1011%
G01RMeasuring electric variables6%
G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices6%
Y02PClimate change mitigation technologies in the production or processing of goods6%
PatentTitleYear
10,817,637System and method of designing integrated circuit by considering local layout effect202010,811,352Semiconductor package202010,446,478Semiconductor package201910,340,263Integrated circuit for reducing ohmic drop in power rails20199,098,670'Double patterning layout design method'20156,861,887'Clocked-scan flip-flop for multi-threshold voltage CMOS circuit'2005Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2005–2020Patents assigned to SAMSUNG ELECTRONICS CO LTD (6)· patent assignee history
2005Based in Seoul, KR· patent location history
2015–2020Based in Suwon-si, KR· patent location history
2019–2020Based in Hwaseong-si, KR· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| SAMSUNG ELECTRONICS CO LTD | 6 | 2005–2020 |
Locations
| Location | Patents | Span |
|---|---|---|
| Suwon-si, KR | 3 | 2015–2020 |
| Hwaseong-si, KR | 2 | 2019–2020 |
| Seoul, KR | 1 | 2005 |