Inventor
Roland Thewes
Inventor
Grobenzell, DE
Overview
Patents· 75 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G11Cprimary
G11CStatic stores30%
G01NInvestigating or analysing materials by determining their chemical or physical properties14%
H03KPulse technique7%
H03FAmplifiers7%
G01RMeasuring electric variables5%
G06FElectric digital data processing5%
G06NComputing arrangements based on specific computational models5%
C12QMeasuring or testing processes involving enzymes, nucleic acids or microorganisms3%
B82YSpecific uses or applications of nanostructures2%
H10DInorganic electric semiconductor devices2%
PatentTitleYear
9,576,642'Memory device with dynamically operated reference circuits'20179,478,275'Reference circuit to compensate for PVT variations in single-ended sense amplifiers'20169,390,771'Circuit and method for sensing a difference in voltage on a pair of dual signal lines, in particular through equalize transistor'20169,251,871'Sense amplifier with dual gate precharge and decode transistors'20169,135,964'Differential sense amplifier without switch transistors'20159,111,593'Differential sense amplifier without dedicated precharge transistors'20158,953,399'Differential sense amplifier without dedicated pass-gate transistors'20158,702,921'Biosensors array and method for operating a biosensor array'20148,262,875'Sensor arrangement and method for detecting a sensor event'20128,183,906'Arrangement, use of an arrangement, reference voltage source and method for generating a voltage value linearly proportional to the temperature'20128,183,879'Measuring arrangement, semiconductor arrangement and method for operating a semiconductor component as a reference source'20127,944,725'Semiconductor memory and method for operating a semiconductor memory'20117,936,628'Semiconductor memory and method for operating a semiconductor memory'20117,914,655'Potentiostatic circuit arrangement on a biosensor for digitisation of the measured current'20117,894,240'Method and apparatus for reducing charge trapping in high-k dielectric material'20117,817,037'Electronic component with ID tags'20107,809,432'Event detection—apparatus and method for measuring the activity of neural networks'20107,756,560'Sensor arrangement and method for operating a sensor arrangement'20107,733,157'Noise-reducing transistor arrangement'20107,733,156'Transistor arrangement, integrated circuit and method for operating field effect transistors'20107,688,625'Circuit arrangement and method for operating a circuit arrangement'20107,670,557'Planar sensor arrangement, sensor array and method for the production of a planar-sensor arrangement'20107,662,341'Sensor arrangement and method for operating a sensor arrangement'20107,572,624'DNA chip comprising a microarray made of an microelectrode system'20097,470,352'Sensor arrangement'20087,432,068'Biosensor and method for detecting macromolecular biopolymers using a biosensor'20087,429,001'Label identification system and coding method suited therefor'20087,398,671'Micromechanical sensor element'20087,379,766'CMOS-process compatible high-DC surface coating for capacitive detection and stimulation of biological tissues'20087,283,372'Circuit element having a first layer of an electrically insulating substrate material and method for manufacturing a circuit element'20077,223,330'Biosensor, biosensor array and method for detecting macromolecular biopolymers with a biosensor'20077,203,859'Variable clock configuration for switched op-amp circuits'20077,123,029'Circuit arrangement, electrochemical sensor, sensor arrangement, and method for processing a current signal provided via a sensor electrode'20067,084,641'Measuring cell and measuring field comprising measuring cells of this type, use of a measuring and use of a measuring field'20067,019,305'Biosensor circuit and sensor array consisting of a plurality of said biosensor circuits and biosensor array'20067,012,468'Circuit configuration and method for reducing the 1/f noise of MOSFETs'20066,922,081'Electronic circuit, sensor arrangement and method for processing a sensor signal'20056,873,173'Test circuit arrangement and method for testing a multiplicity of transistors'20056,870,373'Circuit configuration and method for assessing capacitances in matrices'20056,856,161'Sensor array and method for detecting the condition of a transistor in a sensor array'20056,842,363'Magnetoresistive memory and method for reading a magnetoresistive memory'20056,831,474'Apparatus and method for testing a plurality of electrical components that are coupled to one another'20046,717,843'Polyvalent, magnetoresistive write/read memory and method for writing and reading a memory of this type'20046,625,076'Circuit configuration fir evaluating the information content of a memory cell'20036,611,614'Image acquisition apparatus'20036,580,636'Magnetoresistive memory with a low current density'20036,525,978'Circuit configuration for evaluating the information content of a memory cell'20036,512,688'Device for evaluating cell resistances in a magnetoresistive memory'20036,490,192'Device for evaluating cell resistances in a magnetoresistive memory'20026,487,109'Magnetoresistive memory and method for reading a magnetoresistive memory'20026,466,152'Resistor cascade for forming electrical reference quantities and analog/digital converter'20026,462,979'Integrated memory having memory cells with magnetoresistive storage effect'20026,366,494'Magnetoresistive memory having elevated interference immunity'20026,181,183'Steep edge time-delay relay'20016,166,565'Circuit for comparing two electrical quantities'20006,160,729'Associative memory and method for the operation thereof'20006,138,227'Device for the jump-like addressing of specific lines of a serially operating digital memory'20006,097,661'Pointer circuit with low surface requirement high speed and low power loss'20006,078,190'Threshold logic with improved signal-to-noise ratio'20006,044,006'Method for programming a ROM cell arrangement'20006,037,626'Semiconductor neuron with variable input weights'20006,037,885'Digital/analog converter using a floating gate MOS neuron transistor with capacitive coupling'20006,028,803'Read amplifier for semiconductor memory cells with means to compensate threshold voltage differences in read amplifier transistors'20005,991,789'Circuit arrangement for realizing logic elements that can be represented by threshold value equations'19995,990,709'Circuit for comparing two electrical quantities provided by a first neuron MOS field effect transistor and a reference source'19995,986,464'Threshold logic circuit with low space requirement'19995,942,912'Devices for the self-adjusting setting of the operating point in amplifier circuits with neuron MOS transistors'19995,939,945'Amplifier with neuron MOS transistors'19995,831,892'Matrix memory in virtual ground architecture'19985,825,686'Multi-value read-only memory cell having an improved signal-to-noise ratio'19985,825,701'Memory cell arrangement of memory cells arranged in the form of a matrix'19985,818,112'Arrangement for capacitive signal transmission between the chip layers of a vertically integrated circuit'19985,751,742'Serially accessible memory means with high error correctability'19985,732,013'Matrix memory (virtual ground)'19985,701,037'Arrangement for inductive signal transmission between the chip layers of a vertically integrated circuit'1997Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1997–2014Patents assigned to SIEMENS AG (32)· patent assignee history
1997–2017Based in Puchheim, DE· patent location history
1998–2011Based in Groebenzell, DE· patent location history
2000–2014Based in Grobenzell, DE· patent location history
2002–2012Patents assigned to INFINEON TECHNOLOGIES AG (32)· patent assignee history
2002–2003Based in Grbenzell, DE· patent location history
2005–2012Based in Gröbenzell, DE· patent location history
2012–2015Patents assigned to THEWES ROLAND (7)· patent assignee history
2015–2017Patents assigned to SOITEC SILICON ON INSULATOR (6)· patent assignee history
2015Patents assigned to FERRANT RICHARD (3)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| INFINEON TECHNOLOGIES AG | 32 | 2002–2012 |
| SIEMENS AG | 32 | 1997–2014 |
| THEWES ROLANDself | 7 | 2012–2015 |
| SOITEC SILICON ON INSULATOR | 6 | 2015–2017 |
| FERRANT RICHARD | 3 | 2015 |
Locations
| Location | Patents | Span |
|---|---|---|
| Grobenzell, DE | 20 | 2000–2014 |
| Groebenzell, DE | 16 | 1998–2011 |
| Gröbenzell, DE | 15 | 2005–2012 |
| Puchheim, DE | 10 | 1997–2017 |
| Grbenzell, DE | 9 | 2002–2003 |