Inventor
Woo-Tag Kang
Inventor
Apex, NC, US
Overview
Patents· 16 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices30%
H10BElectronic memory devices23%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1015%
G06FElectric digital data processing5%
G11CStatic stores5%
H01LSemiconductor devices5%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h105%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests5%
G01SRadio direction-finding3%
H01QAntennas, i.e. radio aerials3%
PatentTitleYear
10,944,167Electronic device that reduces antenna interference and enhances antenna performance20219,245,881'Selective fabrication of high-capacitance insulator for a metal-oxide-metal capacitor'20169,116,876'Programmable built-in-self tester (BIST) in memory controller'20158,889,522'High breakdown voltage embedded MIM capacitor structure'20147,439,591'Gate layer diode method and apparatus'20087,256,441'Partially recessed DRAM cell structure'20076,930,357'Active SOI structure with a body contact through an insulator'20056,724,054'Self-aligned contact formation using double SiN spacers'20046,537,885'Transistor and method of manufacturing a transistor having a shallow junction formation using a two step EPI layer'20036,417,547'Semiconductor device with a halo structure'20026,326,270'Methods of forming integrated circuit memory devices using masking layers to inhibit overetching of impurity regions and conductive lines'20016,258,645'Halo structure for CMOS transistors and method of manufacturing the same'20016,218,273'Methods of forming isolation trenches in integrated circuits using protruding insulating layers'20016,130,457'Semiconductor-on-insulator devices having insulating layers therein with self-aligned openings'20006,080,622'Method for fabricating a DRAM cell capacitor including forming a conductive storage node by depositing and etching an insulative layer, filling with conductive material, and removing the insulative layer'20005,877,046'Methods of forming semiconductor-on-insulator substrates'1999Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1999–2021Patents assigned to SAMSUNG ELECTRONICS CO LTD (8)· patent assignee history
1999–2000Based in Seoul, KR· patent location history
2000–2001Based in Kyungki-do, KR· patent location history
2001–2002Based in Sungnam, KR· patent location history
2003–2008Patents assigned to INFINEON TECHNOLOGIES AG (5)· patent assignee history
2004–2008Based in Apex, NC, US· patent location history
2014–2016Patents assigned to QUALCOMM INC (3)· patent assignee history
2014–2016Based in San Diego, CA, US· patent location history
2016Patents assigned to KANG WOO TAG (1)· patent assignee history
2016Patents assigned to KIM JONGHAE (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| SAMSUNG ELECTRONICS CO LTD | 8 | 1999–2021 |
| INFINEON TECHNOLOGIES AG | 5 | 2003–2008 |
| QUALCOMM INC | 3 | 2014–2016 |
| KANG WOO TAGself | 1 | 2016 |
| KIM JONGHAE | 1 | 2016 |
Locations
| Location | Patents | Span |
|---|---|---|
| Apex, NC, US | 4 | 2004–2008 |
| San Diego, California, US | 3 | 2014–2016 |
| Sungnam, KR | 2 | 2001–2002 |
| Kyungki-do, KR | 2 | 2000–2001 |
| Seoul, KR | 2 | 1999–2000 |