Inventor
Lakshminarayan Viswanathan
Inventor
Phoenix, AZ, US
Overview
Patents· 70 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1036%
H01LSemiconductor devices29%
H05KPrinted circuits9%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h107%
H03FAmplifiers6%
B23KSoldering or unsoldering2%
H10DInorganic electric semiconductor devices2%
Y10TTechnical subjects covered by former us classification2%
B22FWorking metallic powder1%
H03HImpedance networks, e.g. resonant circuits1%
PatentTitleYear
11,128,268Power amplifier packages containing peripherally-encapsulated dies and methods for the fabrication thereof202110,861,764Microelectronic components having integrated heat dissipation posts and systems including the same202010,861,774Internally-shielded microelectronic packages and methods for the fabrication thereof202010,825,747Semiconductor device package and methods of manufacture thereof202010,806,021Packaged microelectronic component mounting using sinter attachment202010,785,862Microelectronic modules with sinter-bonded heat dissipation structures and methods for the fabrication thereof202010,741,446Method of wafer dicing for wafers with backside metallization and packaged dies202010,727,153Thick-silver layer interface202010,629,518Internally-shielded microelectronic packages and methods for the fabrication thereof202010,573,594Semiconductor package design providing reduced electromagnetic coupling between circuit components202010,529,638Molded air cavity packages and methods for the production thereof202010,506,704Electromagnetically-shielded microelectronic assemblies and methods for the fabrication thereof201910,485,091Microelectronic modules with sinter-bonded heat dissipation structures and methods for the fabrication thereof201910,440,813Microelectronic modules including thermal extension levels and methods for the fabrication thereof201910,431,449Microelectronic systems containing embedded heat dissipation structures and methods for the fabrication thereof201910,405,417Packaged microelectronic component mounting using sinter attachment201910,396,006Molded air cavity packages and methods for the production thereof201910,375,833Methods of manufacturing packaged electronic devices with top terminations201910,269,678Microelectronic components having integrated heat dissipation posts, systems including the same, and methods for the fabrication thereof201910,211,177High power semiconductor package subsystems201910,199,302Molded air cavity packages and methods for the production thereof201910,199,303Molded air cavity packages and methods for the production thereof201910,147,698Radio frequency (RF) devices201810,141,182Microelectronic systems containing embedded heat dissipation structures and methods for the fabrication thereof201810,109,594Semiconductor device with an isolation structure coupled to a cover of the semiconductor device201810,104,759Microelectronic modules with sinter-bonded heat dissipation structures and methods for the fabrication thereof201810,074,588Semiconductor devices with a thermally conductive layer and methods of their fabrication20189,984,951Sintered multilayer heat sinks for microelectronic packages and methods for the production thereof20189,986,646Packaged electronic devices with top terminations, and methods of manufacture thereof20189,941,210Semiconductor devices with protruding conductive vias and methods of making such devices20189,922,894'Air cavity packages and methods for the production thereof'20189,875,987Electronic devices with semiconductor die attached with sintered metallic layers, and methods of formation of such devices20189,837,327Methods for forming semiconductor device packages20179,837,328Semiconductor device packages20179,824,995'Flexible circuit leads in packaging for radio frequency devices'20179,800,208'Radio frequency devices with surface-mountable capacitors for decoupling and methods thereof'20179,799,580'Semiconductor device package and methods of manufacture thereof'20179,748,185'Semiconductor devices with impedance matching-circuits'20179,698,116'Thick-silver layer interface for a semiconductor die and corresponding thermal layer'20179,673,162'High power semiconductor package subsystems'20179,614,046'Semiconductor devices with a thermally conductive layer'20179,589,860'Electronic devices with semiconductor die coupled to a thermally conductive substrate'20179,538,659'Solder wettable flanges and devices and systems incorporating solder wettable flanges'20179,518,555'Radiation devices'20169,484,222'Semiconductor devices, semiconductor device packages, and packaging techniques for impedance matching and/or low frequency terminations'20169,466,588'Method and apparatus for multi-chip structure semiconductor package'20169,425,161'Semiconductor device with mechanical lock features between a semiconductor die and a substrate'20169,362,198'Semiconductor devices with a thermally conductive layer and methods of their fabrication'20169,312,231'Method and apparatus for high temperature semiconductor device packages and structures using a low temperature process'20169,312,817'Semiconductor package design providing reduced electromagnetic coupling between circuit components'20169,300,254'Radio frequency devices with surface-mountable capacitors for decoupling and methods thereof'20169,281,283'Semiconductor devices with impedance matching-circuits'20169,263,375'System, method and apparatus for leadless surface mounted semiconductor package'20169,159,588'Packaged leadless semiconductor device'20159,111,901'Methods for bonding a die and a substrate'20159,105,599'Semiconductor devices that include a die bonded to a substrate with a gold interface layer'20159,099,567'Packaged semiconductor devices and methods of their fabrication'20158,963,305'Method and apparatus for multi-chip structure semiconductor package'20158,803,302'System, method and apparatus for leadless surface mounted semiconductor package'20148,753,983'Die bonding a semiconductor device'20148,698,291'Packaged leadless semiconductor device'20148,318,545'Method of making a mounted gallium nitride device'20127,446,411'Semiconductor structure and method of assembly'20087,445,967'Method of packaging a semiconductor die and package thereof'20087,429,790'Semiconductor structure and method of manufacture'20086,844,221'Method of manufacturing a wire bond-less electronic component for use with an external circuit'20056,724,079'Wire bond-less electronic component for use with an external circuit and method of manufacture'20046,261,868'Semiconductor component and method for manufacturing the semiconductor component'20016,072,211'Semiconductor package'20006,072,238'Semiconductor component'2000Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2000–2005Patents assigned to MOTOROLA INC (5)· patent assignee history
2000–2021Based in Phoenix, AZ, US· patent location history
2008–2020Patents assigned to FREESCALE SEMICONDUCTOR INC (35)· patent assignee history
2012–2017Patents assigned to VISWANATHAN LAKSHMINARAYAN (17)· patent assignee history
2014–2016Patents assigned to SANCHEZ AUDEL A (6)· patent assignee history
2017–2021Patents assigned to NXP USA INC (43)· patent assignee history
2017Based in Austin, TX, US· patent location history
2018Based in Chandler, AZ, US· patent location history
2020Based in Phoeniz, AZ, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| NXP USA INC | 43 | 2017–2021 |
| FREESCALE SEMICONDUCTOR INC | 35 | 2008–2020 |
| VISWANATHAN LAKSHMINARAYANself | 17 | 2012–2017 |
| SANCHEZ AUDEL A | 6 | 2014–2016 |
| MOTOROLA INC | 5 | 2000–2005 |
Locations
| Location | Patents | Span |
|---|---|---|
| Phoenix, AZ, US | 67 | 2000–2021 |
| Phoeniz, AZ, US | 1 | 2020 |
| Chandler, AZ, US | 1 | 2018 |
| Austin, Texas, US | 1 | 2017 |