Inventor
Bradley A. Orner
Inventor
Fairfax, VT, US
Overview
Patents· 25 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices65%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1014%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h108%
H01LSemiconductor devices5%
G01RMeasuring electric variables3%
G06FElectric digital data processing3%
H03BGeneration of oscillations, directly or by frequency-changing, by circuits employing active elements which operate in a non-switching manner3%
PatentTitleYear
8,987,067'Segmented guard ring structures with electrically insulated gap structures and design structures thereof'20158,853,043'Silicon germanium (SiGe) heterojunction bipolar transistor (HBT)'20148,592,293'Schottky barrier diodes for millimeter wave SiGe BiCMOS applications'20138,525,293'Bipolar transistor with raised extrinsic self-aligned base using selective epitaxial growth for BiCMOS integration'20138,421,478'Radio frequency integrated circuit with on-chip noise source for self-test'20138,338,265'Silicided trench contact to buried conductive layer'20128,299,500'Silicon germanium heterojunction bipolar transistor having interstitial trapping layer in base region'20128,288,244'Lateral passive device having dual annular electrodes'20128,236,662'Bipolar transistor with raised extrinsic self-aligned base using selective epitaxial growth for BiCMOS integration'20128,217,497'FIN differential MOS varactor diode'20128,105,924'Deep trench based far subcollector reachthrough'20128,030,167'Varied impurity profile region formation for varying breakdown voltage of devices'20117,936,041'Schottky barrier diodes for millimeter wave SiGe BICMOS applications'20117,892,910'Bipolar transistor with raised extrinsic self-aligned base using selective epitaxial growth for BiCMOS integration'20117,888,745'Bipolar transistor with dual shallow trench isolation and low base resistance'20117,821,097'Lateral passive device having dual annular electrodes'20107,701,015'Bipolar and CMOS integration with reduced contact height'20107,691,734'Deep trench based far subcollector reachthrough'20107,625,792'Method of base formation in a BiCMOS process'20097,550,787'Varied impurity profile region formation for varying breakdown voltage of devices'20097,381,997'Lateral silicided diodes'20087,335,927'Lateral silicided diodes'20087,326,987'Non-continuous encapsulation layer for MIM capacitor'20086,913,965'Non-Continuous encapsulation layer for MIM capacitor'20056,911,681'Method of base formation in a BiCMOS process'2005Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2005–2015Patents assigned to IBM (25)· patent assignee history
2005–2014Based in Colchester, VT, US· patent location history
2008–2015Based in Fairfax, VT, US· patent location history
2010–2013Based in Cambridge, VT, US· patent location history
2011Based in Fiarfax, VT, US· patent location history
2012–2014Patents assigned to ORNER BRADLEY A (9)· patent assignee history
2012–2013Patents assigned to RASSEL ROBERT M (5)· patent assignee history
2012–2013Patents assigned to JOHNSON JEFFREY B (3)· patent assignee history
2012–2013Patents assigned to LIU XUEFENG (3)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 25 | 2005–2015 |
| ORNER BRADLEY Aself | 9 | 2012–2014 |
| RASSEL ROBERT M | 5 | 2012–2013 |
| JOHNSON JEFFREY B | 3 | 2012–2013 |
| LIU XUEFENG | 3 | 2012–2013 |
Locations
| Location | Patents | Span |
|---|---|---|
| Fairfax, VT, US | 15 | 2008–2015 |
| Colchester, VT, US | 6 | 2005–2014 |
| Cambridge, VT, US | 3 | 2010–2013 |
| Fiarfax, VT, US | 1 | 2011 |