Inventor
Muhammad Raghib Hussain
Inventor
Saratoga, CA, US
Overview
Patents· 47 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing47%
H04LTransmission of digital information, e.g. telegraphic communication47%
H04WWireless communication networks3%
A61BDiagnosis2%
G16HHealthcare informatics, i.e. information and communication technology [ict] specially adapted for the handling or processing of medical or healthcare data2%
PatentTitleYear
10,299,694Method of classifying raw EEG signals201910,235,211Method and apparatus for dynamic virtual system on chip201910,146,463Method and apparatus for a virtual system on chip201810,116,772Network switching with co-resident data-plane and network interface controllers201810,084,719Systems and methods for hardware accelerated metering for openflow protocol20189,823,868'Method and apparatus for virtualization'20179,819,739'Systems and methods for supporting hot plugging of remote storage devices accessed over a network via NVME controller'20179,787,693'Graph caching'20179,729,320'Apparatus and method for software enabled access to protected hardware resources'20179,706,564'Apparatus and method for media access control scheduling with a priority calculation hardware coprocessor'20179,665,300'Method and apparatus for virtualization'20179,652,505'Content search pattern matching using deterministic finite automata (DFA) graphs'20179,602,282'Secure software and hardware association technique'20179,571,412'Systems and methods for hardware accelerated timer implementation for openflow protocol'20179,529,773'Systems and methods for enabling access to extensible remote storage over a network as local storage via a logical storage controller'20169,501,245'Systems and methods for NVMe controller virtualization to support multiple virtual machines running on a host'20169,430,268'Systems and methods for supporting migration of virtual machines accessing remote storage devices over network via NVMe controllers'20169,378,033'Method and apparatus for a virtual system on chip'20169,336,328'Content search mechanism that uses a deterministic finite automata (DFA) graph, a DFA state machine, and a walker process'20169,294,567'Systems and methods for enabling access to extensible storage devices over a network as local storage via NVME controller'20169,237,581'Apparatus and method for media access control scheduling with a sort hardware coprocessor'20168,843,764'Secure software and hardware association technique'20148,826,271'Method and apparatus for a virtual system on chip'20148,819,217'Intelligent graph walking'20148,818,921'Content search mechanism that uses a deterministic finite automata (DFA) graph, a DFA state machine, and a walker process'20148,677,144'Secure software and hardware association technique'20148,661,266'System and method for secure device key storage'20148,601,139'Multiple core session initiation protocol (SIP)'20138,560,475'Content search mechanism that uses a deterministic finite automata (DFA) graph, a DFA state machine, and a walker process'20138,392,590'Deterministic finite automata (DFA) processing'20138,301,788'Deterministic finite automata (DFA) instruction'20128,176,300'Method and apparatus for content based searching'20128,086,609'Graph caching'20117,930,349'Method and apparatus for reducing host overhead in a socket server implementation'20117,814,310'IPsec performance optimization'20107,661,130'Apparatus and method for allocating resources within a security processing architecture using multiple queuing mechanisms'20107,657,933'Apparatus and method for allocating resources within a security processing architecture using multiple groups'20107,613,813'Method and apparatus for reducing host overhead in a socket server implementation'20097,602,919'Method of integrating QKD with IPSec'20097,594,081'Direct access to low-latency memory'20097,535,907'TCP engine'20097,398,386'Transparent IPSec processing inline between a framer and a network component'20087,337,314'Apparatus and method for allocating resources within a security processor'20087,305,567'Decoupled architecture for data ciphering operations'20077,240,203'Method and apparatus for establishing secure sessions'20077,162,034'Method and apparatus for multi-session time-slot multiplexing'20076,789,147'Interface for a security coprocessor'2004Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2004–2013Based in Pleasanton, CA, US· patent location history
2007–2011Patents assigned to CAVIUM NETWORKS INC (9)· patent assignee history
2011–2018Patents assigned to CAVIUM INC (30)· patent assignee history
2011–2017Patents assigned to GOYAL RAJAN (6)· patent assignee history
2011–2017Patents assigned to HUSSAIN MUHAMMAD RAGHIB (6)· patent assignee history
2011–2017Based in San Jose, CA, US· patent location history
2012–2014Patents assigned to HUSSAIN MUHAMMAD R (4)· patent assignee history
2012–2019Based in Saratoga, CA, US· patent location history
2013Based in Pleasonton, CA, US· patent location history
2019Based in Riyadh, SA· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| CAVIUM INC | 30 | 2011–2018 |
| CAVIUM NETWORKS INC | 9 | 2007–2011 |
| GOYAL RAJAN | 6 | 2011–2017 |
| HUSSAIN MUHAMMAD RAGHIBself | 6 | 2011–2017 |
| HUSSAIN MUHAMMAD Rself | 4 | 2012–2014 |
Locations
| Location | Patents | Span |
|---|---|---|
| Saratoga, California, US | 26 | 2012–2019 |
| Pleasanton, California, US | 16 | 2004–2013 |
| San Jose, California, US | 3 | 2011–2017 |
| Riyadh, SA | 1 | 2019 |
| Pleasonton, California, US | 1 | 2013 |