Inventor
Jerry A. Kreifels
Inventor
El Dorado Hills, CA, US
Overview
Patents· 21 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G11Cprimary
G11CStatic stores66%
G06FElectric digital data processing24%
G01RMeasuring electric variables7%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h103%
PatentTitleYear
RE042551'Block locking apparatus for flash memory'20117,437,499'Dividing a flash memory operation into phases'20087,200,708'Apparatus and methods for storing data which self-compensate for erase performance degradation'20076,597,605'Systems with non-volatile memory bit sequence program control'20036,418,059'Method and apparatus for non-volatile memory bit sequence program controller'20026,148,360'Nonvolatile writeable memory with program suspend command'20006,073,243'Block locking and passcode scheme for flash memory'20006,035,401'Block locking apparatus for flash memory'20005,954,818'Method of programming, erasing, and reading block lock-bits and a master lock-bit in a flash memory device'19995,937,424'Method and apparatus for suspending the writing of a nonvolatile semiconductor memory with program suspend command'19995,850,509'Circuitry for propagating test mode signals associated with a memory array'19985,526,311'Method and circuitry for enabling and permanently disabling test mode access in a flash memory device'19965,459,355'Multiple layer programmable layout for version identification'19955,412,793'Method for testing erase characteristics of a flash memory array'19955,410,544'External tester control for flash memory'19955,369,647'Circuitry and method for testing a write state machine'19945,339,320'Architecture of circuitry for generating test mode signals'19945,222,046'Processor controlled command port architecture for flash memory'19935,053,990'Program/erase selection for flash memory'19914,860,261'Leakage verification for flash EPROM'19894,841,482'Leakage verification for flash EPROM'1989Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1989–2008Patents assigned to INTEL CORP (20)· patent assignee history
1989–1998Based in Citrus Heights, CA, US· patent location history
1995–2011Based in El Dorado Hills, CA, US· patent location history
2011Patents assigned to DALVI VISHRAM PRAKASH (1)· patent assignee history
2011Patents assigned to EVERTT JEFF (1)· patent assignee history
2011Patents assigned to HAID CHRISTOPHER JOHN (1)· patent assignee history
2011Patents assigned to JAVANIFARD JAHANSHIR J (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| INTEL CORP | 20 | 1989–2008 |
| DALVI VISHRAM PRAKASH | 1 | 2011 |
| EVERTT JEFF | 1 | 2011 |
| HAID CHRISTOPHER JOHN | 1 | 2011 |
| JAVANIFARD JAHANSHIR J | 1 | 2011 |
Locations
| Location | Patents | Span |
|---|---|---|
| El Dorado Hills, California, US | 12 | 1995–2011 |
| Citrus Heights, California, US | 9 | 1989–1998 |