Inventor
George B. Marenin
Inventor
San Jose, CA, US
Overview
Patents· 7 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing88%
H04LTransmission of digital information, e.g. telegraphic communication13%
PatentTitleYear
5,859,986'Bandwidth efficient method and means for resynchronizing a master and slave over a clocked, arbitrated, bidirectional multistate parallel bus using local data recirculation, wait states, and cycle stealing'19995,687,393'System for controlling responses to requests over a data bus between a plurality of master controllers and a slave storage controller by inserting control characters'19975,613,067'Method and apparatus for assuring that multiple messages in a multi-node network are assured fair access to an outgoing data stream'19975,195,185'Dynamic bus arbitration with concurrent same bus granting every cycle'19934,378,589'Undirectional looped bus microcomputer architecture'19834,339,793'Function integrated, shared ALU processor apparatus and method'19824,181,934'Microprocessor architecture with integrated interrupts and cycle steals prioritized channel'1980Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1980–1999Patents assigned to IBM (7)· patent assignee history
1980–1999Based in San Jose, CA, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 7 | 1980–1999 |
Locations
| Location | Patents | Span |
|---|---|---|
| San Jose, California, US | 7 | 1980–1999 |