Inventor
Travis J. Pizel
Inventor
Rochester, MN, US
Overview
Patents· 20 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing95%
H04LTransmission of digital information, e.g. telegraphic communication5%
PatentTitleYear
10,810,122Dynamic I/O translation table allocation for single root input output virtualization enabled I/O adapters202010,310,759Use efficiency of platform memory resources through firmware managed I/O translation table paging201910,275,362Dynamic address translation table allocation201910,025,725Dynamic address translation table allocation20189,710,395'Dynamic address translation table allocation'20179,424,155'Use efficiency of platform memory resources through firmware managed I/O translation table paging'20169,355,052'Dynamically resizing direct memory access (DMA) windows'20169,330,037'Dynamically resizing direct memory access (DMA) windows'20169,146,863'Address translation table to enable access to virtualized functions'20159,104,600'Merging direct memory access windows'20159,104,601'Merging direct memory access windows'20159,092,366'Splitting direct memory access windows'20159,092,365'Splitting direct memory access windows'20158,495,274'Address translation table to enable access to virtual functions'20138,386,679'Dynamic allocation of a direct memory address window'20137,769,919'Protecting computer memory from simultaneous direct memory access operations using active and inactive translation tables'20107,366,798'Allocation of differently sized memory address ranges to input/output endpoints in memory mapped input/output fabric based upon determined locations of input/output endpoints'20087,200,687'Location-based non-uniform allocation of memory resources in memory mapped input/output fabric'20077,076,634'Address translation manager and method for a logically partitioned computer system'20066,986,017'Buffer pre-registration'2006Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2006–2020Patents assigned to IBM (20)· patent assignee history
2006–2020Based in Rochester, MN, US· patent location history
2013–2015Patents assigned to PIZEL TRAVIS J (3)· patent assignee history
2013–2015Patents assigned to BROWNLOW SEAN T (2)· patent assignee history
2013–2015Patents assigned to NORDSTROM GREGORY M (2)· patent assignee history
2013Patents assigned to O'QUIN II JOHN T (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 20 | 2006–2020 |
| PIZEL TRAVIS Jself | 3 | 2013–2015 |
| BROWNLOW SEAN T | 2 | 2013–2015 |
| NORDSTROM GREGORY M | 2 | 2013–2015 |
| O'QUIN II JOHN T | 1 | 2013 |
Locations
| Location | Patents | Span |
|---|---|---|
| Rochester, Minnesota, US | 20 | 2006–2020 |