Inventor

Chitra K. Subramanian

Inventor

Mahopac, NY, US

Overview

68→

Patents

1996–2021

Patent span

Physics

Primary field (CPC G)

Patents· 68 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G11Cprimary

G11CStatic stores47%

G06FElectric digital data processing13%

H10DInorganic electric semiconductor devices8%

Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use5%

H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h104%

G01TMeasurement of nuclear or x-radiation3%

H10BElectronic memory devices3%

H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h103%

B82YSpecific uses or applications of nanostructures2%

C23CCoating metallic material2%

PatentTitleYear

11,074,968Method and system to improve read reliability in memory devices2021 11,023,208True random number generator2021 10,884,918System implementation of one-time programmable memories2021 10,679,912Wafer scale testing and initialization of small die chips2020 10,657,065Delayed write-back in memory2020 10,475,497Self-referenced sense amplifier with precharge2019 10,388,578Wafer scale testing and initialization of small die chips2019 10,268,591Delayed write-back in memory2019 10,269,405Write verify programming of a memory device2019 10,020,041Self-referenced sense amplifier with precharge2018 9,990,300Delayed write-back in memory2018 9,972,373Self-referenced read with offset current in a memory2018 9,697,879'Memory device with shared read/write circuitry'2017 9,697,880'Self-referenced read with offset current in a memory'2017 9,679,627'Write verify programming of a memory device'2017 9,569,640'Tamper detection and response in a memory device'2017 9,552,863'Memory device with sampled resistance controlled write voltages'2017 9,530,476'Memory device with shared read/write circuitry'2016 9,502,093'Method of writing to a spin torque magnetic random access memory'2016 9,401,195'Self-referenced sense amplifier for spin-torque MRAM'2016 9,378,798'Method of writing to a spin torque magnetic random access memory'2016 9,336,849'Memory device with shared read/write circuitry'2016 9,336,848'Memory device with differential bit cells'2016 9,299,411'Hybrid read scheme for spin torque MRAM'2016 9,245,611'Method of writing to a spin torque magnetic random access memory'2016 9,218,865'Self-referenced sense amplifier for spin torque MRAM'2015 9,183,911'Hybrid read scheme for spin torque MRAM'2015 9,135,970'Tamper detection and response in a memory device'2015 9,121,957'Radiation modulation in a security examination apparatus'2015 9,111,622'Self referencing sense amplifier for spin torque MRAM'2015 9,047,969'Method of writing to a spin torque magnetic random access memory'2015 8,958,524'Correction of projection data in radiation system'2015 8,923,041'Self-referenced sense amplifier for spin torque MRAM'2014 8,811,071'Method of writing to a spin torque magnetic random access memory'2014 8,184,476'Random access memory architecture including midpoint reference'2012 7,543,211'Toggle memory burst'2009 7,532,533'Antifuse circuit and method for selectively programming thereof'2009 7,327,853'Method of and system for extracting 3D bag images from continuously reconstructed 2D image slices in computed tomography'2008 7,224,630'Antifuse circuit'2007 7,224,763'Method of and system for X-ray spectral correction in multi-energy computed tomography'2007 7,206,223'MRAM memory with residual write field reset'2007 7,154,772'MRAM architecture with electrically isolated read and write circuitry'2006 6,944,052'Magnetoresistive random access memory (MRAM) cell having a diode with asymmetrical characteristics'2005 6,903,964'MRAM architecture with electrically isolated read and write circuitry'2005 6,859,388'Circuit for write field disturbance cancellation in an MRAM and method of operation'2005 6,842,365'Write driver for a magnetoresistive memory'2005 6,760,266'Sense amplifier and method for performing a read operation in a MRAM'2004 6,744,663'Circuit and method for reading a toggle memory cell'2004 6,738,303'Technique for sensing the state of a magneto-resistive random access memory'2004 6,714,440'Memory architecture with write circuitry and method therefor'2004 6,711,052'Memory having a precharge circuit and method therefor'2004 6,711,068'Balanced load memory and method of operation'2004 6,693,824'Circuit and method of writing a toggle memory'2004 6,667,899'Magnetic memory and method of bi-directional write current programming'2003 6,657,889'Memory having write current ramp rate control'2003 6,621,729'Sense amplifier incorporating a symmetric midpoint reference'2003 6,600,690'Sense amplifier for a memory having at least two distinct resistance states'2003 6,580,298'Three input sense amplifier and method of operation'2003 6,413,819'Memory device and method for using prefabricated isolated storage elements'2002 6,297,095'Memory device that includes passivated nanoclusters and method for manufacture'2001 6,136,678'Method of processing a conductive layer and forming a semiconductor device'2000 5,958,508'Process for forming a semiconductor device'1999 5,824,579'Method of forming shared contact structure'1998 5,721,167'Process for forming a semiconductor device and a static-random-access memory cell'1998 5,668,021'Process for fabricating a semiconductor device having a segmented channel region'1997 5,665,202'Multi-step planarization process using polishing at two different pad pressures'1997 5,494,837'Method of forming semiconductor-on-insulator electronic devices by growing monocrystalline semiconducting regions from trench sidewalls'1996 5,481,126'Semiconductor-on-insulator electronic devices having trench isolated monocrystalline active regions'1996

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1996–2009Based in Austin, TX, US· patent location history

1997–2004Patents assigned to MOTOROLA INC (19)· patent assignee history

2004–2007Patents assigned to FREESCALE SEMICONDUCTOR INC (8)· patent assignee history

2007–2015Patents assigned to ANALOGIC CORP (4)· patent assignee history

2007–2015Based in Salem, MA, US· patent location history

2009–2020Patents assigned to EVERSPIN TECHNOLOGIES INC (30)· patent assignee history

2012–2021Based in Mahopac, NY, US· patent location history

2015Based in Peabody, MA, US· patent location history

2019–2021Patents assigned to IBM (5)· patent assignee history

2021Based in Putnam, NY, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
EVERSPIN TECHNOLOGIES INC	30	2009–2020
MOTOROLA INC	19	1997–2004
FREESCALE SEMICONDUCTOR INC	8	2004–2007
IBM	5	2019–2021
ANALOGIC CORP	4	2007–2015

Locations

Location	Patents	Span
Mahopac, New York, US	32	2012–2021
Austin, Texas, US	31	1996–2009
Salem, Massachusetts, US	3	2007–2015
Putnam, New York, US	1	2021
Peabody, Massachusetts, US	1	2015