Inventor
Saman M. I. Adham
Inventor
Kanata, CA
Overview
Patents· 24 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G11Cprimary
G11CStatic stores38%
G06FElectric digital data processing24%
G01RMeasuring electric variables14%
H03MCoding8%
H04LTransmission of digital information, e.g. telegraphic communication8%
G01NInvestigating or analysing materials by determining their chemical or physical properties5%
G09CCiphering or deciphering apparatus for cryptographic or other purposes involving the need for secrecy3%
PatentTitleYear
11,050,574Authentication based on physically unclonable functions202110,965,475Physical unclonable function (PUF) security key generation202110,838,809Memory array and measuring and testing methods for inter-hamming differences of memory array202010,740,174Memory address protection circuit and method202010,539,617Scan architecture for interconnect testing in 3D integrated circuits202010,515,710Hamming-distance analyzer201910,511,451Physically unclonable function (PUF) device and method of extending challenge/response pairs in a PUF device201910,382,060On-line self-checking hamming encoder, decoder and associated method201910,372,532Memory array and measuring and testing methods for inter-hamming differences of memory array20199,835,680Method, device and computer program product for circuit testing20179,625,523'Method and apparatus for interconnect test'20179,367,662'Fault injection of finFET devices'20169,341,672'Method and apparatus for interconnect test'20169,269,459'Mechanisms for built-in self test and repair for memory devices'20168,959,468'Fault injection of finFET devices'20158,942,051'Mechanisms for built-in self test and repair for memory devices'20158,873,318'Mechanisms for built-in self repair of memory devices using failed bit maps and obvious repairs'20148,760,949'Mechanisms for built-in self repair of memory devices using failed bit maps and obvious repairs'20148,605,527'Mechanisms for built-in self test and repair for memory devices'20138,509,014'Mechanisms for built-in self repair of memory devices using failed bit maps and obvious repairs'20137,257,733'Memory repair circuit and method'20077,139,946'Method and test circuit for testing memory internal write enable'20065,668,817'Self-testable digital signal processor and method for self-testing of integrating circuits including DSP data paths'19975,313,469'Self-testable digital integrator'1994Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1994–2020Based in Kanata, CA· patent location history
2006–2007Patents assigned to LOGICVISION INC (2)· patent assignee history
2013–2016Patents assigned to TAIWAN SEMICONDUCTOR MFG (8)· patent assignee history
2013–2014Patents assigned to ADHAM SAMAN M I (3)· patent assignee history
2013–2014Patents assigned to SHVYDUN VOLODYMYR (3)· patent assignee history
2013–2019Based in Ontario, CA· patent location history
2016–2021Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (12)· patent assignee history
2019–2021Based in Hsinchu, TW· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TAIWAN SEMICONDUCTOR MFG CO LTD | 12 | 2016–2021 |
| TAIWAN SEMICONDUCTOR MFG | 8 | 2013–2016 |
| ADHAM SAMAN M Iself | 3 | 2013–2014 |
| SHVYDUN VOLODYMYR | 3 | 2013–2014 |
| LOGICVISION INC | 2 | 2006–2007 |
Locations
| Location | Patents | Span |
|---|---|---|
| Kanata, CA | 15 | 1994–2020 |
| Ontario, CA | 6 | 2013–2019 |
| Hsinchu, TW | 3 | 2019–2021 |