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Inventor

Nan-Chi Chou

Inventor
Fremont, CA, US

Overview

2→
Patents
2007–2010
Patent span
Physics
Primary field (CPC G)

Patents· 2 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary
G06FElectric digital data processing100%
PatentTitleYear
7,716,622'Memory re-implementation for field programmable gate arrays'20107,251,803'Memory re-implementation for field programmable gate arrays'2007

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2007–2010Patents assigned to CHOU NAN-CHI (2)· patent assignee history
2007–2010Patents assigned to DING YUZHENG (2)· patent assignee history
2007–2010Patents assigned to LIU LUNG-TIEN (2)· patent assignee history
2007–2010Patents assigned to SUARIS PETER RAMYALAL (2)· patent assignee history
2007–2010Based in Fremont, CA, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
CHOU NAN-CHIself22007–2010
DING YUZHENG22007–2010
LIU LUNG-TIEN22007–2010
SUARIS PETER RAMYALAL22007–2010
Locations
LocationPatentsSpan
Fremont, California, US22007–2010