Inventor

Hirobumi Inoue

Inventor
Tokyo, JP

Overview

13→
Patents
1997–2016
Patent span
Physics
Primary field (CPC G)

Patents· 13 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G01Rprimary
G01RMeasuring electric variables37%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1026%
Y10TTechnical subjects covered by former us classification11%
B60CVehicle tyres5%
G06FElectric digital data processing5%
H04NPictorial communication, e.g. television5%
H05KPrinted circuits5%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h105%
PatentTitleYear
9,283,812'Pneumatic radial tire for heavy loads'20167,594,644'Semiconductor device and method for manufacturing the same, circuit board, electronic apparatus, and semiconductor device manufacturing apparatus'20097,434,190'Analysis method and analysis apparatus of designing transmission lines of an integrated circuit packaging board'20087,321,166'Wiring board having connecting wiring between electrode plane and connecting pad'20086,998,704'Semiconductor device and method for manufacturing the same, circuit board, electronic apparatus, and semiconductor device manufacturing apparatus'20066,486,688'Semiconductor device testing apparatus having a contact sheet and probe for testing high frequency characteristics'20026,433,410'Semiconductor device tester and method of testing semiconductor device'20026,400,168'Method for fabricating probe tip portion composed by coaxial cable'20026,310,483'Longitudinal type high frequency probe for narrow pitched electrodes'20016,281,691'Tip portion structure of high-frequency probe and method for fabrication probe tip portion composed by coaxial cable'20016,242,930'High-frequency probe capable of adjusting characteristic impedance in end part and having the end part detachable'20016,229,321'Process for manufacturing high frequency multichip module enabling independent test of bare chip'20015,614,944'Test method and apparatus of sequentially executing synchronous signal test, dot level test, and gradation test of a video signal generator'1997

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1997–2009Patents assigned to NEC CORP (12)· patent assignee history
1997–2009Based in Tokyo, JP· patent location history
2001–2002Patents assigned to ANRITSU CORP (4)· patent assignee history
2001Patents assigned to ANTRITSU CORP (1)· patent assignee history
2016Patents assigned to BRIDGESTONE CORP (1)· patent assignee history
2016Patents assigned to INOUE HIROBUMI (1)· patent assignee history
2016Based in Kodaira, JP· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
NEC CORP121997–2009
ANRITSU CORP42001–2002
ANTRITSU CORP12001
BRIDGESTONE CORP12016
INOUE HIROBUMIself12016
Locations
LocationPatentsSpan
Tokyo, JP121997–2009
Kodaira, JP12016