Inventor

Miroslav Micovic

Inventor

Thousand Oaks, CA, US

Overview

2001–2019

Patent span

Electricity

Primary field (CPC H)

Patents· 61 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Dprimary

H10DInorganic electric semiconductor devices30%

H01LSemiconductor devices20%

H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1016%

H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1014%

H03FAmplifiers7%

H05KPrinted circuits4%

B82YSpecific uses or applications of nanostructures2%

H01PWaveguides1%

H03GControl of amplification1%

G01KMeasuring temperature1%

PatentTitleYear

10,483,184Recursive metal embedded chip assembly2019 10,418,473Monolithic integration of group III nitride epitaxial layers2019 10,217,648Fabrication of microfluidic channels in diamond2019 10,170,611T-gate field effect transistor with non-linear channel layer and/or gate foot face2019 10,079,160Surface mount package for semiconductor devices with embedded heat spreaders2018 10,026,672Recursive metal embedded chip assembly2018 9,954,090Monolithic integration of group III nitride epitaxial layers2018 9,929,243'Stepped field plate wide bandgap field-effect transistor and method'2018 9,842,814'Integrated RF subsystem'2017 9,837,372Wafer-level die to package and die to die interconnects suspended over integrated heat sinks2017 9,780,014'Simultaneous controlled depth hot embossing and active side protection during packaging and assembly of wide bandgap devices'2017 9,553,057'E-plane probe with stepped surface profile for high-frequency'2017 9,525,033'Methods relating to a group III HFET with a graded barrier layer'2016 9,496,197'Near junction cooling for GaN devices'2016 9,449,833'Methods of fabricating self-aligned FETS using multiple sidewall spacers'2016 9,419,122'Etch-based fabrication process for stepped field-plate wide-bandgap'2016 9,385,083'Wafer-level die to package and die to die interconnects suspended over integrated heat sinks'2016 9,378,949'Monolithic integration of group III nitride epitaxial layers'2016 9,379,680'Systems, methods, and apparatus for a power amplifier module'2016 9,337,124'Method of integration of wafer level heat spreaders and backside interconnects on microelectronics wafers'2016 9,331,735'GaN based active cancellation circuit for high power simultaneous transmit and receive systems'2016 9,276,529'High performance GaN operational amplifier with wide bandwidth and high dynamic range'2016 9,252,247'Apparatus and method for reducing the interface resistance in GaN Heterojunction FETs'2016 9,214,404'Apparatus for mounting microelectronic chips'2015 9,202,880'Etch-based fabrication process for stepped field-plate wide-bandgap'2015 9,190,534'Enhancement mode normally-off gallium nitride heterostructure field effect transistor'2015 9,148,092'Monolithic integration of field-plate and T-gate devices'2015 9,142,626'Stepped field plate wide bandgap field-effect transistor and method'2015 9,093,394'Method and structure for encapsulation and interconnection of transistors'2015 9,059,140'Simultaneous controlled depth hot embossing and active side protection during packaging and assembly of wide bandgap devices'2015 8,980,759'Method of fabricating slanted field-plate GaN heterojunction field-effect transistor'2015 8,860,091'Group III-N HFET with a graded barrier layer'2014 8,796,736'Monolithic integration of group III nitride epitaxial layers'2014 8,766,321'Self-aligned sidewall gate GaN HEMT'2014 8,748,244'Enhancement and depletion mode GaN HMETs on the same substrate'2014 8,728,884'Enhancement mode normally-off gallium nitride heterostructure field effect transistor'2014 8,698,201'Gate metallization methods for self-aligned sidewall gate GaN HEMT'2014 8,686,473'Apparatus and method for reducing the interface resistance in GaN heterojunction FETs'2014 8,617,927'Method of mounting electronic chips'2013 8,592,983'Method of integrating a plurality of benzocyclobutene layers with a substrate and an associated device'2013 8,558,281'Gate metallization methods for self-aligned sidewall gate GaN HEMT'2013 8,470,652'Monolithic integration of group III nitride enhancement layers'2013 8,383,471'Self aligned sidewall gate GaN HEMT'2013 8,368,119'Integrated structure with transistors and schottky diodes and process for fabricating the same'2013 8,030,688'Ohmic metal contact protection using an encapsulation layer'2011 7,989,277'Integrated structure with transistors and Schottky diodes and process for fabricating the same'2011 7,852,153'High efficiency linear microwave power amplifier'2010 7,695,564'Thermal management substrate'2010 7,598,131'High power-low noise microwave GaN heterojunction field effect transistor'2009 7,566,916'Ohmic metal contact and channel protection in GaN devices using an encapsulation layer'2009 7,477,102'High efficiency linear microwave power amplifier'2009 7,470,941'High power-low noise microwave GaN heterojunction field effect transistor'2008 7,098,490'GaN DHFET'2006 7,025,501'Tracking temperature change in birefringent materials'2006 6,894,325'Fabrication of low resistance, non-alloyed, ohmic contacts to InP using non-stoichiometric InP layers'2005 6,884,704'Ohmic metal contact and channel protection in GaN devices using an encapsulation layer'2005 6,852,615'Ohmic contacts for high electron mobility transistors and a method of making the same'2005 6,670,653'InP collector InGaAsSb base DHBT device and method of forming same'2003 6,583,455'Fabrication of low resistance, non-alloyed, OHMIC contacts to INP using non-stoichiometric INP layers'2003 6,287,946'Fabrication of low resistance, non-alloyed, ohmic contacts to InP using non-stoichiometric InP layers'2001 6,232,624'InPSb channel HEMT on InP for RF application'2001

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2001–2019Patents assigned to HRL LAB LLC (56)· patent assignee history

2001–2011Based in Newbury Park, CA, US· patent location history

2006–2019Based in Thousand Oaks, CA, US· patent location history

2013–2016Patents assigned to MICOVIC MIROSLAV (12)· patent assignee history

2013–2016Patents assigned to CORRION ANDREA (6)· patent assignee history

2013–2016Patents assigned to SHINOHARA KEISUKE (6)· patent assignee history

2013–2014Patents assigned to BURNHAM SHAWN D (4)· patent assignee history

2016Based in Los Angeles, CA, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
HRL LAB LLC	56	2001–2019
MICOVIC MIROSLAVself	12	2013–2016
CORRION ANDREA	6	2013–2016
SHINOHARA KEISUKE	6	2013–2016
BURNHAM SHAWN D	4	2013–2014

Locations

Location	Patents	Span
Thousand Oaks, California, US	48	2006–2019
Newbury Park, California, US	12	2001–2011
Los Angeles, California, US	1	2016