Inventor
Johann Gatterbauer
Inventor
Parsberg, DE
Overview
Patents· 14 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1033%
H01LSemiconductor devices28%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1016%
H10FInorganic semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation7%
H10HInorganic light-emitting semiconductor devices having potential barriers7%
Y02EReduction of greenhouse gas [ghg] emissions, related to energy generation, transmission or distribution7%
B81BMicrostructural devices or systems, e.g. micromechanical devices2%
PatentTitleYear
11,127,693Barrier for power metallization in semiconductor devices202110,978,418Method of forming an electrical contact and method of forming a chip package with a metal contact structure and protective layer202110,607,972Semiconductor devices for integration with light emitting chips and modules thereof202010,461,056Chip package and method of forming a chip package with a metal contact structure and protective layer, and method of forming an electrical contact201910,049,994Contact pads with sidewall spacers and method of making contact pads with sidewall spacers20189,966,368Semiconductor devices for integration with light emitting chips and modules thereof20189,875,978Semiconductor chip device20189,704,839'Semiconductor devices for integration with light emitting chips and modules thereof'20179,502,248'Methods for making a semiconductor chip device'20169,362,216'Conductive pads and methods of formation thereof'20169,082,626'Conductive pads and methods of formation thereof'20158,822,327'Contact pads with sidewall spacers and method of making contact pads with sidewall spacers'20148,765,531'Method for manufacturing a metal pad structure of a die, a method for manufacturing a bond pad of a chip, a die arrangement and a chip arrangement'20148,736,062'Pad sidewall spacers and method of making pad sidewall spacers'2014Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2014–2021Patents assigned to INFINEON TECHNOLOGIES AG (14)· patent assignee history
2014Patents assigned to GATTERBAUER JOHANN (3)· patent assignee history
2014Patents assigned to WEIDGANS BERNHARD (2)· patent assignee history
2014Patents assigned to BUSCH JOERG (1)· patent assignee history
2014–2021Based in Parsberg, DE· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| INFINEON TECHNOLOGIES AG | 14 | 2014–2021 |
| GATTERBAUER JOHANNself | 3 | 2014 |
| WEIDGANS BERNHARD | 2 | 2014 |
| BUSCH JOERG | 1 | 2014 |
Locations
| Location | Patents | Span |
|---|---|---|
| Parsberg, DE | 14 | 2014–2021 |