Inventor

Gwo-Shii Yang

Inventor

Hsinchu, TW

Overview

21→

Patents

1999–2021

Patent span

Electricity

Primary field (CPC H)

Patents· 21 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Wprimary

H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1042%

H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1021%

H10DInorganic electric semiconductor devices13%

H10BElectronic memory devices5%

Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests5%

G01RMeasuring electric variables3%

G09GArrangements or circuits for control of indicating devices using static means to present variable information3%

H01LSemiconductor devices3%

H10KOrganic electric solid-state devices3%

Y10TTechnical subjects covered by former us classification3%

PatentTitleYear

11,069,303Organic light-emitting display device and method of driving the same2021 6,806,182'Method for eliminating via resistance shift in organic ILD'2004 6,750,129'Process for forming fusible links'2004 6,583,489'Method for forming interconnect structure with low dielectric constant'2003 6,559,004'Method for forming three dimensional semiconductor structure and three dimensional capacitor'2003 6,475,865'Method of fabricating semiconductor device'2002 6,316,330'Method of fabricating a shallow trench isolation semiconductor device'2001 6,306,722'Method for fabricating shallow trench isolation structure'2001 6,281,143'Method of forming borderless contact'2001 6,254,676'Method for manufacturing metal oxide semiconductor transistor having raised source/drain'2001 6,251,783'Method of manufacturing shallow trench isolation'2001 6,248,644'Method of fabricating shallow trench isolation structure'2001 6,249,138'Method for testing leakage current caused self-aligned silicide'2001 6,238,989'Process of forming self-aligned silicide on source/drain region'2001 6,228,742'Method of fabricating shallow trench isolation structure'2001 6,218,243'Method of fabricating a DRAM capacitor'2001 6,200,904'Method of forming a contact hole of a DRAM'2001 6,180,492'Method of forming a liner for shallow trench isolation'2001 6,146,974'Method of fabricating shallow trench isolation (STI)'2000 6,087,262'Method for manufacturing shallow trench isolation structure'2000 5,956,598'Method for fabricating a shallow-trench isolation structure with a rounded corner in integrated circuit'1999

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1999–2003Patents assigned to UNITED MICROELECTRONICS CORP (18)· patent assignee history

1999–2004Based in Hsinchu, TW· patent location history

2001Based in Hsinschu, TW· patent location history

2004Patents assigned to INFINEON TECHNOLOGIES AG (2)· patent assignee history

2004Patents assigned to IBM (1)· patent assignee history

2004Patents assigned to UNITED MICROELECTRONICS CO (1)· patent assignee history

2021Patents assigned to SAMSUNG DISPLAY CO LTD (1)· patent assignee history

2021Based in Yongin-si, KR· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
UNITED MICROELECTRONICS CORP	18	1999–2003
INFINEON TECHNOLOGIES AG	2	2004
IBM	1	2004
SAMSUNG DISPLAY CO LTD	1	2021
UNITED MICROELECTRONICS CO	1	2004

Locations

Location	Patents	Span
Hsinchu, TW	19	1999–2004
Yongin-si, KR	1	2021
Hsinschu, TW	1	2001