Inventor
Kyu S. Min
Inventor
San Jose, CA, US
Overview
Patents· 24 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices18%
B82YSpecific uses or applications of nanostructures14%
H10BElectronic memory devices14%
G11CStatic stores11%
G11BInformation storage based on relative movement between record carrier and transducer6%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h106%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests6%
H01LSemiconductor devices5%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h105%
C01PIndexing scheme relating to structural and physical aspects of solid inorganic compounds3%
PatentTitleYear
10,967,347Chute type monomer dispenser202110,608,005Thickened sidewall dielectric for memory cell20209,059,301'Self-aligned charge-trapping layers for non-volatile data storage, processes of forming same, and devices containing same'20158,900,946'Method of forming layers using atomic layer deposition'20148,748,264'Self-aligned charge-trapping layers for non-volatile data storage, processes of forming same, and devices containing same'20148,729,704'Multilayer dielectric memory device'20148,643,082'Thickened sidewall dielectric for memory cell'20148,643,079'Nanocrystal formation using atomic layer deposition and resulting apparatus'20148,546,944'Multilayer dielectric memory device'20138,228,743'Memory cells containing charge-trapping zones'20128,183,110'Memory cells, methods of forming dielectric materials, and methods of forming memory cells'20128,058,140'Thickened sidewall dielectric for memory cell'20117,989,289'Floating gate structures'20117,968,406'Memory cells, methods of forming dielectric materials, and methods of forming memory cells'20117,898,850'Memory cells, electronic systems, methods of forming memory cells, and methods of programming memory cells'20117,795,607'Current focusing memory architecture for use in electrical probe-based memory storage'20107,773,493'Probe-based storage device'20107,763,511'Dielectric barrier for nanocrystals'20107,750,433'Probe-based memory'20107,705,389'Thickened sidewall dielectric for memory cell'20107,585,564'Post-deposition encapsulation of nanostructures: compositions, devices and systems incorporating same'20097,498,655'Probe-based memory'20097,267,875'Post-deposition encapsulation of nanostructures: compositions, devices and systems incorporating same'20077,223,701'In-situ sequential high density plasma deposition and etch processing for gap fill'2007Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2007–2015Patents assigned to INTEL CORP (11)· patent assignee history
2007–2020Based in San Jose, CA, US· patent location history
2010–2020Patents assigned to MICRON TECHNOLOGY INC (10)· patent assignee history
2011–2014Patents assigned to GRAETTINGER TOM (2)· patent assignee history
2011–2014Patents assigned to MIN KYU (2)· patent assignee history
2012–2014Patents assigned to MIN KYU S (6)· patent assignee history
2021Based in Daejeon, KR· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| INTEL CORP | 11 | 2007–2015 |
| MICRON TECHNOLOGY INC | 10 | 2010–2020 |
| MIN KYU Sself | 6 | 2012–2014 |
| GRAETTINGER TOM | 2 | 2011–2014 |
| MIN KYUself | 2 | 2011–2014 |
Locations
| Location | Patents | Span |
|---|---|---|
| San Jose, California, US | 23 | 2007–2020 |
| Daejeon, KR | 1 | 2021 |