Inventor
Ming-Hsiang Song
Inventor
Shin-Chu, TW
Overview
Patents· 54 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices40%
H01LSemiconductor devices28%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1010%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h106%
H02HEmergency protective circuit arrangements4%
G11CStatic stores3%
G01RMeasuring electric variables2%
G06FElectric digital data processing2%
H03KPulse technique2%
H10BElectronic memory devices2%
PatentTitleYear
10,803,967Memory device with a fuse protection circuit202010,790,274SCRs with checker board layouts202010,756,082Method of forming electrostatic discharge (ESD) testing structure202010,741,543Device including integrated electrostatic discharge protection component202010,643,726Memory device with a fuse protection circuit202010,325,906ESD testing structure, method of using same and method of forming same201910,283,210Memory device with a fuse protection circuit201910,269,986Rotated STI diode on FinFET technology201910,109,366Memory device with a fuse protection circuit201810,096,589Fin ESD protection diode and fabrication method thereof20189,979,186Electrostatic discharge protection for three dimensional integrated circuit20189,978,739Semiconductor arrangement facilitating enhanced thermo-conduction20189,882,002'FinFET with an asymmetric source/drain structure and method of making same'20189,842,833'Electrostatic discharge protection'20179,831,235Method of making structure having a gate stack20179,812,436'SCRs with checker board layouts'20179,666,575'Semiconductor arrangement facilitating enhanced thermo-conduction'20179,647,452'Electrostatic discharge protection for level-shifter circuit'20179,576,949'Diode formed of PMOSFET and schottky diodes'20179,576,945'Methods and apparatus for increased holding voltage in silicon controlled rectifiers for ESD protection'20179,466,978'Electrostatic discharge protection for level-shifter circuit'20169,443,850'Epitaxial growth between gates'20169,443,840'Methods and apparatus for ESD structures'20169,425,247'Metal-insulator-metal capacitor with current leakage protection'20169,397,217'Contact structure of non-planar semiconductor device'20169,318,621'Rotated STI diode on FinFET technology'20169,245,878'Bidirectional dual-SCR circuit for ESD protection'20169,231,106'FinFET with an asymmetric source/drain structure and method of making same'20169,230,961'Semiconductor arrangement facilitating enhanced thermo-conduction'20169,178,008'Metal-insulator-metal capacitor with current leakage protection'20159,172,242'Electrostatic discharge protection for three dimensional integrated circuit'20159,147,676'SCRs with checker board layouts'20159,130,008'Robust ESD protection with silicon-controlled rectifier'20159,117,669'Apparatus for ESD protection'20158,963,200'Methods and apparatus for increased holding voltage in silicon controlled rectifiers for ESD protection'20158,940,596'Method of making structure having a gate stack'20158,921,943'Methods and apparatus for ESD structures'20148,906,767'Semiconductor device with self-aligned interconnects'20148,779,518'Apparatus for ESD protection'20148,759,871'Bidirectional dual-SCR circuit for ESD protection'20148,730,626'Electrostatic discharge protection'20148,692,289'Fast turn on silicon controlled rectifiers for ESD protection'20148,610,220'Semiconductor device with self-aligned interconnects'20138,587,074'Device having a gate stack'20138,493,705'Electrostatic discharge circuit for radio frequency transmitters'20138,405,943'Circuit and method for power clamp triggered dual SCR ESD protection'20138,324,658'ESD protection circuit for RFID tag'20128,079,528'Input/output pads placement for a smart card chip'20118,049,250'Circuit and method for power clamp triggered dual SCR ESD protection'20117,500,214'System and method for reducing design cycle time for designing input/output cells'20097,420,250'Electrostatic discharge protection device having light doped regions'20087,411,767'Multi-domain ESD protection circuit structure'20087,323,752'ESD protection circuit with floating diffusion regions'20087,062,740'System and method for reducing design cycle time for designing input/output cells'2006Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2006–2016Patents assigned to TAIWAN SEMICONDUCTOR MFG (27)· patent assignee history
2006–2020Based in Shin-Chu, TW· patent location history
2008–2020Based in Hsinchu, TW· patent location history
2011–2017Patents assigned to SONG MING-HSIANG (12)· patent assignee history
2013–2017Patents assigned to LEE JAM-WEM (5)· patent assignee history
2014–2015Patents assigned to CHANG TZU-HENG (4)· patent assignee history
2015–2020Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (27)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TAIWAN SEMICONDUCTOR MFG | 27 | 2006–2016 |
| TAIWAN SEMICONDUCTOR MFG CO LTD | 27 | 2015–2020 |
| SONG MING-HSIANGself | 12 | 2011–2017 |
| LEE JAM-WEM | 5 | 2013–2017 |
| CHANG TZU-HENG | 4 | 2014–2015 |
Locations
| Location | Patents | Span |
|---|---|---|
| Shin-Chu, TW | 40 | 2006–2020 |
| Hsinchu, TW | 14 | 2008–2020 |