Inventor

Shwang-Ming Jeng

Inventor
Hsinchu, TW

Overview

35→
Patents
2001–2019
Patent span
Electricity
Primary field (CPC H)

Patents· 35 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1040%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1028%
H01LSemiconductor devices12%
H10DInorganic electric semiconductor devices7%
A44BButtons, pins, buckles, slide fasteners, or the like2%
B29CShaping or joining of plastics2%
B29LIndexing scheme associated with subclass b29c, relating to particular articles2%
B24BMachines, devices, or processes for grinding or polishing1%
C23CCoating metallic material1%
G01RMeasuring electric variables1%
PatentTitleYear
10,510,580Dummy fin structures and methods of forming same201910,312,107Forming interconnect structure using plasma treated metal hard mask201910,144,109Polisher, polishing tool, and polishing method20189,589,856'Automatically adjusting baking process for low-k dielectric material'20179,368,452'Metal conductor chemical mechanical polish'20169,196,551'Automatically adjusting baking process for low-k dielectric material'20159,087,877'Low-k interconnect structures with reduced RC delay'20159,004,914'Method of and apparatus for active energy assist baking'20158,993,435'Low-k Cu barriers in damascene interconnect structures'20158,877,083'Surface treatment in the formation of interconnect structure'20148,853,858'Curing low-k dielectrics for improving mechanical strength'20148,703,612'Process for forming contact plugs'20148,673,783'Metal conductor chemical mechanical polish'20148,481,412'Method of and apparatus for active energy assist baking'20138,324,731'Integrated circuit device'20128,258,629'Curing low-k dielectrics for improving mechanical strength'20128,105,947'Post etch dielectric film re-capping layer'2012RE042514'Extreme low-K dielectric film scheme for advanced interconnects'2011RE041935'Method for preventing low-k dielectric layer cracking in multi-layered dual damascene metallization layers'20107,805,692'Method for local hot spot fixing'20107,723,226'Interconnects containing bilayer porous low-k dielectrics using different porogen to structure former ratio'20107,646,097'Bond pads and methods for fabricating the same'20107,626,245'Extreme low-k dielectric film scheme for advanced interconnect'20097,485,949'Semiconductor device'20097,465,676'Method for forming dielectric film to improve adhesion of low-k film'20087,365,026'CxHy sacrificial layer for cu/low-k interconnects'20087,042,049'Composite etching stop in semiconductor process integration'20066,869,836'ILD stack with improved CMP results'20056,846,756'Method for preventing low-k dielectric layer cracking in multi-layered dual damascene metallization layers'20056,821,905'Method for avoiding carbon and nitrogen contamination of a dielectric insulating layer'20046,753,260'Composite etching stop in semiconductor process integration'20046,657,284'Graded dielectric layer and method for fabrication thereof'20036,620,745'Method for forming a blocking layer'20036,372,661'Method to improve the crack resistance of CVD low-k dielectric constant material'20026,319,809'Method to reduce via poison in low-k Cu dual damascene by UV-treatment'2001

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2001–2019Based in Hsinchu, TW· patent location history
2002–2016Patents assigned to TAIWAN SEMICONDUCTOR MFG (30)· patent assignee history
2002–2005Based in Hsin-Tien, TW· patent location history
2012–2015Patents assigned to JENG SHWANG-MING (10)· patent assignee history
2012–2015Patents assigned to LIN KENG-CHU (7)· patent assignee history
2012–2015Patents assigned to KO CHUNG-CHI (5)· patent assignee history
2017–2019Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (4)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
TAIWAN SEMICONDUCTOR MFG302002–2016
JENG SHWANG-MINGself102012–2015
LIN KENG-CHU72012–2015
KO CHUNG-CHI52012–2015
TAIWAN SEMICONDUCTOR MFG CO LTD42017–2019
Locations
LocationPatentsSpan
Hsinchu, TW322001–2019
Hsin-Tien, TW32002–2005