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Inventor

Koji Komatsu

Inventor
Nara, JP

Overview

29→
Patents
1986–2017
Patent span
Physics
Primary field (CPC G)

Patents· 29 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G11Cprimary
G11CStatic stores30%
G06FElectric digital data processing10%
H04NPictorial communication, e.g. television10%
H10BElectronic memory devices10%
G06NComputing arrangements based on specific computational models8%
E02FDredging5%
G05BControl or regulating systems in general5%
G11BInformation storage based on relative movement between record carrier and transducer5%
F04CRotary-piston, or oscillating-piston, positive-displacement machines for liquids3%
G01NInvestigating or analysing materials by determining their chemical or physical properties3%
PatentTitleYear
9,787,964'Information processing device, information processing method, and program'20179,735,906'Demultiplexing device and multiplexing device'20178,289,417'Imaging device'20128,176,073'Imaging device'20127,743,005'Diagnosis of abnormal operation modes of a machine utilizing self organizing map'20107,664,715'Apparatus and method for compressing data, apparatus and method for analyzing data, and data management system'20107,464,063'Information processor, state judging unit and diagnostic unit, information processing method, state judging method and diagnosing method'20087,443,843'Terminal relay device and relay method'20087,150,612'Gear pump or motor'20066,862,742'Information distribution apparatus'20056,844,921'Wafer holder'20056,265,906'Sense amplifier circuit'20016,215,725'Clock-synchronized memory'20016,198,648'Semiconductor memory device with hierarchical bit line architecture'20016,154,065'Sense amplifier circuit'20006,128,210'Semiconductor memory device'20006,002,606'Semiconductor memory device'19995,953,244'Semiconductor memory device capable of page mode or serial access mode'19995,949,139'Semiconductor integrated circuit device capable of achieving reductions in chip area and consumption power'19995,930,195'Semiconductor memory device'19995,926,432'Semiconductor storage device having a hierarchical bit line structure'19995,852,570'Semiconductor memory using select transistors coupled to sub-bitlines from different blocks'19985,812,440'Semiconductor storage device'19985,726,929'Semiconductor storage device'19985,392,405'Data processor for detecting identical data coexisting in a plurality of data sections of data transmission paths'19955,317,756'Data processor for detecting identical data coexisting in a plurality of data section of data transmission paths'19945,123,090'Data processing apparatus for processing asynchronous data in an asynchronous type data flow computer'19925,113,339'Data processor for detecting identical data simultaneously coexisting in a plurality of data sections of data transmission paths'19924,592,967'Gas sensor of mixed oxides'1986

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1992–2001Patents assigned to SHARP KK (17)· patent assignee history
1992–2001Based in Nara, JP· patent location history
1992–1994Based in Tenri, JP· patent location history
2005–2017Patents assigned to FUJITSU LTD (3)· patent assignee history
2008–2010Patents assigned to CATERPILLAR JAPAN LTD (2)· patent assignee history
2010Based in Takamatsu, JP· patent location history
2012–2017Patents assigned to SONY CORP (3)· patent assignee history
2012Patents assigned to KOMATSU KOJI (2)· patent assignee history
2012–2017Based in Tokyo, JP· patent location history
2017Based in Nishinomiya, JP· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
SHARP KK171992–2001
FUJITSU LTD32005–2017
SONY CORP32012–2017
CATERPILLAR JAPAN LTD22008–2010
KOMATSU KOJIself22012
Locations
LocationPatentsSpan
Nara, JP151992–2001
Tokyo, JP32012–2017
Takamatsu, JP22010
Tenri, JP21992–1994
Nishinomiya, JP12017