Inventor
Ugo RUSSO
Inventor
US
Overview
Patents· 22 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G11Cprimary
G11CStatic stores40%
G06FElectric digital data processing29%
H10BElectronic memory devices14%
H10DInorganic electric semiconductor devices10%
H01LSemiconductor devices5%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h102%
PatentTitleYear
12,548,630Media management scanning with unified criteria to alleviate fast and latent read disturb202612,501,619Microelectronic devices with tunneling structures having partial-height high-k material regions202512,423,002Selectively programming retired wordlines of a memory device202512,417,035Modified read counter incrementing scheme in a memory sub-system202512,400,688Assemblies comprising memory cells and select gates; and methods of forming assemblies202512,353,771Charge loss mitigation throughout memory device lifecycle by proactive window shift202512,326,782Adjustment of code rate as function of memory endurance state metric202512,260,916Partial block handling in a non-volatile memory device202512,224,016Transient and stable state read operations of a memory device202512,131,028Programming selective word lines during an erase operation in a memory device202411,983,067Adjustment of code rate as function of memory endurance state metric202411,977,774Charge loss mitigation throughout memory device lifecycle by proactive window shift202411,961,581Assemblies comprising memory cells and select gates; and methods of forming assemblies202411,922,029Modified read counter incrementing scheme in a memory sub-system202411,925,022Microelectronic and semiconductor devices with a tunneling structure free of high-g material by a select gate structure, and related methods202411,901,014Partial block handling in a non-volatile memory device202411,776,633Apparatus and methods for determining data states of memory cells202311,664,079Intervallic dynamic start voltage and program verify sampling in a memory sub-system202311,569,255Void formation in charge trap structures202311,526,277Adjustable NAND write performance202211,462,281Intervallic dynamic start voltage and program verify sampling in a memory sub-system202211,211,399Electronic apparatus with an oxide-only tunneling structure by a select gate tier, and related methods2021Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2021–2026Patents assigned to MICRON TECHNOLOGY INC (20)· patent assignee history
2021–2026Based in US· patent location history
2025Patents assigned to LODESTAR LICENSING GROUP LLC (1)· patent assignee history
2025Patents assigned to MICRON TECHNOLGY INC (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| MICRON TECHNOLOGY INC | 20 | 2021–2026 |
| LODESTAR LICENSING GROUP LLC | 1 | 2025 |
| MICRON TECHNOLGY INC | 1 | 2025 |
Locations
| Location | Patents | Span |
|---|---|---|
| US | 22 | 2021–2026 |