Inventor
Joseph W. Triece
Inventor
Phoenix, AZ, US
Overview
Patents· 34 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing65%
H03KPulse technique11%
G11CStatic stores9%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use7%
H04LTransmission of digital information, e.g. telegraphic communication4%
G01RMeasuring electric variables2%
H02MApparatus for conversion between ac and ac, between ac and dc, or between dc and dc, and for use with mains or similar power supply systems2%
PatentTitleYear
11,003,606DMA-scatter and gather operations for non-contiguous memory20219,921,985'Direct memory access controller'20189,208,095'Configurable cache for a microprocessor'20159,141,572'Direct memory access controller'20158,825,912'Dynamic state configuration restore'20148,825,926'Processor with assignable general purpose register set'20148,779,734'Integrated circuit device with two voltage regulators'20148,650,341'Method for CAN concatenating CAN data payloads'20148,650,356'Microcontroller with CAN module'20148,117,475'Direct memory access controller'20127,966,457'Configurable cache for a microprocessor'20117,877,537'Configurable cache for a microprocessor'20117,788,434'Interrupt controller handling interrupts with and without coalescing'20107,603,601'Enabling special modes within a digital device'20097,401,176'Method and system for fast access to stack memory'20087,206,924'Microcontroller instruction set'20077,203,818'Microcontroller instruction set'20076,985,986'Variable cycle interrupt disabling'20066,976,158'Repeat instruction with interrupt'20056,708,268'Microcontroller instruction set'20046,601,160'Dynamically reconfigurable data space'20036,578,139'Processor architecture scheme which uses virtual address registers to implement different addressing modes and method therefor'20036,563,740'Electronic circuit and method for testing and refreshing non-volatile memory'20036,463,544'Method for powering down unused configuration bits to minimize power consumption'20026,321,319'Computer system for allowing a two word jump instruction to be executed in the same number of cycles as a single word jump instruction'20016,243,798'Computer system for allowing a two word jump instruction to be executed in the same number of cycles as a single word jump instruction'20016,230,275'Circuit for powering down unused configuration bits to minimize power consumption'20016,192,463'Processor architecture scheme which uses virtual address registers to implement different addressing modes and method therefor'20016,167,527'Clocking system for microcontrollers'20006,098,160'Data pointer for outputting indirect addressing mode addresses within a single cycle and method therefor'20006,038,655'Microcontroller having register direct and register indirect addressing'20005,987,583'Processor architecture scheme and instruction set for maximizing available opcodes and address selection modes'19995,905,880'Robust multiple word instruction and method therefor'19995,473,271'Microprocessor output driver'1995Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1995–2000Patents assigned to DALLAS SEMICONDUCTOR (3)· patent assignee history
1995–2000Based in Flower Mound, TX, US· patent location history
1999–2021Patents assigned to MICROCHIP TECH INC (31)· patent assignee history
1999–2021Based in Phoenix, AZ, US· patent location history
2012–2015Patents assigned to TRIECE JOSEPH W (7)· patent assignee history
2012–2015Patents assigned to PESAVENTO RODNEY J (3)· patent assignee history
2014Patents assigned to DAWSON STEVEN G (2)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| MICROCHIP TECH INC | 31 | 1999–2021 |
| TRIECE JOSEPH Wself | 7 | 2012–2015 |
| DALLAS SEMICONDUCTOR | 3 | 1995–2000 |
| PESAVENTO RODNEY J | 3 | 2012–2015 |
| DAWSON STEVEN G | 2 | 2014 |
Locations
| Location | Patents | Span |
|---|---|---|
| Phoenix, AZ, US | 31 | 1999–2021 |
| Flower Mound, Texas, US | 3 | 1995–2000 |