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Inventor

So-Zen Yao

Inventor
Fremont, CA, US

Overview

8→
Patents
2001–2015
Patent span
Physics
Primary field (CPC G)

Patents· 8 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary
G06FElectric digital data processing100%
PatentTitleYear
9,177,093'Routing interconnect of integrated circuit designs with varying grid densities'20158,386,984'Interconnect routing methods of integrated circuit designs'20138,365,128'Routing interconnect of integrated circuit designs'20138,291,365'Conditionally routing a portion of an integrated circuit design with a different pitch to overcome a design rule violation'20128,255,857'Routing methods for integrated circuit designs'20127,716,621'Method and system for improving signal integrity in integrated circuit designs'20107,036,101'Method and apparatus for scalable interconnect solution'20066,327,693'Interconnect delay driven placement and routing of an integrated circuit design'2001

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2001–2015Based in Fremont, CA, US· patent location history
2006–2015Patents assigned to CADENCE DESIGN SYSTEMS INC (7)· patent assignee history
2012–2013Patents assigned to CHAO LIANG-JIH (4)· patent assignee history
2012–2013Patents assigned to CHEN JING (4)· patent assignee history
2012–2013Patents assigned to DENG WENYONG (4)· patent assignee history
2012–2013Patents assigned to HE LIMIN (4)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
CADENCE DESIGN SYSTEMS INC72006–2015
CHAO LIANG-JIH42012–2013
CHEN JING42012–2013
DENG WENYONG42012–2013
HE LIMIN42012–2013
Locations
LocationPatentsSpan
Fremont, California, US82001–2015