Inventor
Tzu-Hsuan Hsu
Inventor
Kaohsiung, TW
Overview
Patents· 140 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Fprimary
H10FInorganic semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation28%
H01LSemiconductor devices19%
H10DInorganic electric semiconductor devices13%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1012%
G11CStatic stores9%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h108%
H10BElectronic memory devices5%
H04NPictorial communication, e.g. television3%
Y02EReduction of greenhouse gas [ghg] emissions, related to energy generation, transmission or distribution1%
Y02PClimate change mitigation technologies in the production or processing of goods1%
PatentTitleYear
10,861,899Interconnect structure for stacked device and method202010,818,720Stacked image sensor having a barrier layer202010,734,423Semiconductor switching device separated by device isolation202010,535,706Interconnect structure for stacked device and method202010,522,586Apparatus for reducing optical cross-talk in image sensors201910,515,994Semiconductor devices, methods of manufacturing thereof, and image sensor devices201910,510,542Gate electrodes with notches and methods for forming the same201910,468,441Semiconductor switching device separated by device isolation201910,381,0943D memory with staged-level multibit programming201910,283,547Stacked image sensor having a barrier layer201910,157,959Interconnect structure for stacked device and method201810,157,958Vertically integrated image sensor chips and methods for forming the same201810,141,358Semiconductor switching device separated by device isolation201810,128,304Isolation for semiconductor devices201810,090,353Semiconductor devices, methods of manufacturing thereof, and image sensor devices201810,074,612Method for forming alignment marks and structure of same201810,008,532Implant isolated devices and method for forming the same20189,991,307Stacked grid design for improved optical performance and isolation20189,978,805Method for manufacturing image sensor structure having wide contact20189,966,412Method for reducing optical cross-talk in image sensors20189,966,405Method and apparatus for image sensor packaging20189,941,249Multi-wafer stacking by Ox-Ox bonding20189,917,132'CMOS image sensor structure with IR/NIR integration'20189,905,426'Gate electrodes with notches and methods for forming the same'20189,887,234'CMOS image sensor and method for forming the same'20189,871,070'Voltage biased metal shielding and deep trench isolation for backside illuminated (BSI) image sensors'20189,865,645'Interconnect structure for stacked device and method'20189,853,082Color filter array and micro-lens structure for imaging system20179,847,368Vertically integrated image sensor chips and methods for forming the same20179,812,482'Frontside illuminated (FSI) image sensor with a reflector'20179,768,224'Image sensor including multiple lenses and method of manufacture thereof'20179,711,562'Apparatus and method for reducing optical cross-talk in image sensors'20179,711,560'CMOS image sensor structure with IR/NIR integration'20179,704,910'Semiconductor switching device separated by device isolation'20179,673,245'Implant isolated devices and method for forming the same'20179,666,630'Semiconductor devices, methods of manufacturing thereof, and image sensor devices'20179,627,326'Method for forming alignment marks and structure of same'20179,620,548'Image sensor with wide contact'20179,559,244'CMOS image sensors and methods for forming the same'20179,536,920'Stacked image sensor having a barrier layer'20179,473,753'Apparatus and method for reducing optical cross-talk in image sensors'20169,455,158'3DIC interconnect devices and methods of forming same'20169,356,066'Interconnect structure for stacked device and method'20169,355,964'Method for forming alignment marks and structure of same'20169,355,888'Implant isolated devices and method for forming the same'20169,318,640'Method and apparatus for image sensor packaging'20169,312,294'Semiconductor devices, methods of manufacturing thereof, and image sensor devices'20169,293,502'Semiconductor switching device separated by device isolation'20169,281,334'Pickup device structure within a device isolation region'20169,263,272'Gate electrodes with notches and methods for forming the same'20169,263,143'Three dimensional memory device and data erase method thereof'20169,252,155'Memory device and method for manufacturing the same'20169,246,015'Vertical channel transistor structure and manufacturing method thereof'20169,190,345'Semiconductor devices and methods of manufacture thereof'20159,177,986'Isolation for semiconductor devices'20159,123,615'Vertically integrated image sensor chips and methods for forming the same'20159,076,708'CMOS image sensors and methods for forming the same'20159,048,162'CMOS image sensors and methods for forming the same'20159,041,206'Interconnect structure and method'20158,987,113'Image sensor including multiple lenses and method of manufacture thereof'20158,975,687'Nonvolatile memory array with continuous charge storage dielectric stack'20158,941,204'Apparatus and method for reducing cross talk in image sensors'20158,878,242'Pickup device structure within a device isolation region'20148,847,299'Non-volatile memory and non-volatile memory cell having asymmetrical doped structure'20148,790,954'Method of making wafer structure for backside illuminated color image sensor'20148,785,984'Method for making multi-step photodiode junction structure for backside illuminated sensor'20148,772,858'Vertical channel memory and manufacturing method thereof and operating method using the same'20148,766,387'Vertically integrated image sensor chips and methods for forming the same'20148,759,141'Backside depletion for backside illuminated image sensors'20148,710,560'Embedded bonding pad for image sensors'20148,704,277'Spectrally efficient photodiode for backside illuminated sensor'20148,686,533'Isolation structure'20148,525,286'Method of making wafer structure for backside illuminated color image sensor'2013RE044376'Silicon substrate with reduced surface roughness'20138,481,388'Non-volatile memory device having a nitride-oxide dielectric layer'20138,436,443'Backside depletion for backside illuminated image sensors'20138,405,177'Method to optimize substrate thickness for image sensor device'20138,324,002'Image sensor element for backside-illuminated sensor'20128,325,530'Cell operation methods using gate-injection for floating gate NAND flash memory'20128,304,354'Methods to avoid laser anneal boundary effect within BSI CMOS image sensor array'20128,258,029'Semiconductor structure and process for reducing the second bit effect of a memory device'20128,252,654'Method for manufacturing memory cell'20128,247,882'Method of forming an isolation structure'20128,178,407'Systems and methods for a high density, compact memory array'20128,124,495'Semiconductor device having enhanced photo sensitivity and method for manufacture thereof'20128,072,813'Method and apparatus for programming nonvolatile memory'20118,072,810'Program and erase methods with substrate transient hot carrier injections in a non-volatile memory'20118,053,287'Method for making multi-step photodiode junction structure for backside illuminated sensor'20118,030,721'Method to optimize substrate thickness for image sensor device'20118,022,466'Non-volatile memory cells having a polysilicon-containing, multi-layer insulating structure, memory arrays including the same and methods of operating the same'20118,009,482'High temperature methods for enhancing retention characteristics of memory devices'20117,999,342'Image sensor element for backside-illuminated sensor'20117,973,380'Method for providing metal extension in backside illuminated sensor for wafer level testing'20117,939,903'Photodetector for backside-illuminated sensor'20117,923,279'Method and structure for reducing cross-talk in image sensor devices'20117,897,477'Method of forming an isolation structure'20117,881,112'Program and erase methods with substrate transient hot carrier injections in a non-volatile memory'20117,863,067'Silicon substrate with reduced surface roughness'20117,855,411'Memory cell'20107,851,848'Cylindrical channel charge trapping devices with effectively high coupling ratios'20107,839,695'High temperature methods for enhancing retention characteristics of memory devices'20107,838,325'Method to optimize substrate thickness for image sensor device'20107,824,948'Method and structure for reducing cross-talk in image sensor devices'20107,811,890'Vertical channel transistor structure and manufacturing method thereof'20107,803,647'Optical transmission improvement on multi-dielectric structure in advance CMOS imager'20107,799,654'Reduced refractive index and extinction coefficient layer for enhanced photosensitivity'20107,795,088'Method for manufacturing memory cell'20107,773,430'Method of identifying logical information in a programming and erasing cell by on-side reading scheme'20107,763,927'Non-volatile memory device having a nitride-oxide dielectric layer'20107,701,769'Method and apparatus for programming nonvolatile memory'20107,656,000'Photodetector for backside-illuminated sensor'20107,638,852'Method of making wafer structure for backside illuminated color image sensor'20097,608,886'Systems and methods for a high density, compact memory array'20097,590,005'Program and erase methods with substrate transient hot carrier injections in a non-volatile memory'20097,510,924'Method for manufacturing memory cell'20097,495,967'Method of identifying logical information in a programming and erasing cell by on-side reading scheme'20097,485,940'Guard ring structure for improving crosstalk of backside illuminated image sensor'20097,483,299'Devices and operation methods for reducing second bit effect in memory device'20097,474,562'Method of forming and operating an assisted charge memory device'20097,450,423'Methods of operating non-volatile memory cells having an oxide/nitride multilayer insulating structure'20087,423,306'CMOS image sensor devices'20087,387,907'Image sensor with optical guard ring and fabrication method thereof'20087,355,897'Methods to resolve hard-to-erase condition in charge trapping non-volatile memory'20087,342,264'Memory cell and method for manufacturing the same'20087,338,830'Hollow dielectric for image sensor'20087,301,219'Electrically erasable programmable read only memory (EEPROM) cell and method for making the same'20077,268,379'Memory cell and method for manufacturing the same'20077,253,458'CMOS image sensor'20077,242,622'Methods to resolve hard-to-erase condition in charge trapping non-volatile memory'20077,242,430'High dynamic range image sensor cell'20077,232,697'Semiconductor device having enhanced photo sensitivity and method for manufacture thereof'20077,209,390'Operation scheme for spectrum shift in charge trapping non-volatile memory'20077,139,200'Method of identifying logical information in a programming and erasing cell by on-side reading scheme'20067,122,840'Image sensor with optical guard ring and fabrication method thereof'20067,085,168'Programming method for controlling memory threshold voltage distribution'20067,078,779'Enhanced color image sensor device and method of making the same'20067,038,928'Method of determining optimal voltages for operating two-side non-volatile memory and the operating methods'20066,982,443'Hollow dielectric for image sensor'20066,952,038'3D polysilicon ROM and method of fabrication thereof'20056,937,511'Circuit and method for programming charge storage memory cells'2005Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2005–2019Patents assigned to MACRONIX INT CO LTD (43)· patent assignee history
2006–2016Patents assigned to TAIWAN SEMICONDUCTOR MFG (56)· patent assignee history
2006–2020Based in Kaohsiung, TW· patent location history
2006–2014Based in Hsinchu, TW· patent location history
2007–2016Based in Chiayi County, TW· patent location history
2009–2016Based in Jhudong Township, TW· patent location history
2011–2016Patents assigned to HSU TZU-HSUAN (27)· patent assignee history
2012–2016Patents assigned to YAUNG DUN-NIAN (10)· patent assignee history
2015–2019Based in Cianjhen District, TW· patent location history
2016–2020Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (41)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TAIWAN SEMICONDUCTOR MFG | 56 | 2006–2016 |
| MACRONIX INT CO LTD | 43 | 2005–2019 |
| TAIWAN SEMICONDUCTOR MFG CO LTD | 41 | 2016–2020 |
| HSU TZU-HSUANself | 27 | 2011–2016 |
| YAUNG DUN-NIAN | 10 | 2012–2016 |
Locations
| Location | Patents | Span |
|---|---|---|
| Kaohsiung, TW | 93 | 2006–2020 |
| Chiayi County, TW | 14 | 2007–2016 |
| Hsinchu, TW | 12 | 2006–2014 |
| Jhudong Township, TW | 7 | 2009–2016 |
| Cianjhen District, TW | 3 | 2015–2019 |