Inventor
Michael Klein
Inventor
Schoenaich, DE
Overview
Patents· 25 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing54%
G11CStatic stores8%
H03MCoding8%
G01RMeasuring electric variables5%
G11BInformation storage based on relative movement between record carrier and transducer5%
H04LTransmission of digital information, e.g. telegraphic communication5%
B41JTypewriters3%
B41MPrinting, duplicating, marking, or copying processes3%
C09DCoating compositions, e.g. paints, varnishes or lacquers3%
G06KGraphical data reading3%
PatentTitleYear
10,983,159Method and apparatus for wiring multiple technology evaluation circuits202110,890,622Integrated circuit control latch protection202110,572,223Parallel decimal multiplication hardware with a 3x generator202010,558,432Multiply-add operations of binary numbers in an arithmetic unit202010,416,962Decimal and binary floating point arithmetic calculations201910,372,417Multiply-add operations of binary numbers in an arithmetic unit201910,310,815Parallel decimal multiplication hardware with a 3X generator201910,296,294Multiply-add operations of binary numbers in an arithmetic unit201910,275,391Combining of several execution units to compute a single wide scalar result201910,169,451Rapid character substring searching201910,140,090Computing and summing up multiple products in a single multiplier20189,959,093Binary fused multiply-add floating-point calculations20189,952,829Binary fused multiply-add floating-point calculations20189,928,135'Non-local error detection in processor systems'20189,734,126'Post-silicon configurable instruction behavior based on input operands'20179,697,074'Non-local error detection in processor systems'20179,529,664'Using error correcting codes for parity purposes'20169,513,987'Using error correcting codes for parity purposes'20169,430,190'Fused multiply add pipeline'20168,626,807'Reuse of rounder for fixed conversion of log instructions'20148,352,530'Residue calculation with built-in correction in a floating point unit positioned at different levels using correction values provided by multiplexer'20138,244,783'Normalizer shift prediction for log estimate instructions'20128,186,601'Non-volatile memory charge pump for radio frequency identification (RFID) system'20125,695,820'Method for alleviating marangoni flow-induced print defects in ink-jet printing'19975,394,403'Fully testable chip having self-timed memory arrays'1995Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1995Based in Palo Alto, CA, US· patent location history
1997Based in La Mesa, CA, US· patent location history
2012–2021Patents assigned to IBM (22)· patent assignee history
2012–2014Patents assigned to KLEIN MICHAEL (4)· patent assignee history
2012–2014Patents assigned to PREISS JOCHEN (2)· patent assignee history
2012Patents assigned to ATMEL CORP (1)· patent assignee history
2012–2021Based in Schoenaich, DE· patent location history
2012Based in Colorado Springs, CO, US· patent location history
2014Patents assigned to BOERSMA MAARTEN (1)· patent assignee history
2016–2019Based in Boeblingen, DE· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 22 | 2012–2021 |
| KLEIN MICHAELself | 4 | 2012–2014 |
| PREISS JOCHEN | 2 | 2012–2014 |
| ATMEL CORP | 1 | 2012 |
| BOERSMA MAARTEN | 1 | 2014 |
Locations
| Location | Patents | Span |
|---|---|---|
| Schoenaich, DE | 19 | 2012–2021 |
| Boeblingen, DE | 3 | 2016–2019 |
| Colorado Springs, CO, US | 1 | 2012 |
| La Mesa, California, US | 1 | 1997 |
| Palo Alto, California, US | 1 | 1995 |