Inventor
Xin MIAO
Inventor
US
Overview
Patents· 40 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices23%
H01LSemiconductor devices22%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1011%
B82YSpecific uses or applications of nanostructures10%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h107%
H10BElectronic memory devices3%
C12QMeasuring or testing processes involving enzymes, nucleic acids or microorganisms2%
B01LChemical or physical laboratory apparatus for general use1%
B60LPropulsion of electrically-propelled vehicles1%
C12NMicroorganisms or enzymes1%
PatentTitleYear
12,598,786Field effect transistor structures202612,408,317SRAM macro design architecture202512,402,293Stacked SRAM cell architecture202512,356,712Device structure for inducing layout dependent threshold voltage shift202512,230,676Nanosheet device with tri-layer bottom dielectric isolation202512,163,863Detection system for suspension system of maglev train202411,982,589Magnetic levitation test system and electromagnet test method202411,908,937Vertical transport field-effect transistor with ring-shaped wrap-around contact202411,881,505Tri-layer STI liner for nanosheet leakage control202411,764,259Vertical field-effect transistor with dielectric fin extension202311,761,029Programmable nuclease compositions and methods of use thereof202311,739,638Travelling-type tunnel hard-rock micro-damage cutting equipment and construction method associated therewith202311,735,658Tunnel field-effect transistor with reduced subthreshold swing202311,728,340Single diffusion break isolation for gate-all-around field-effect transistor devices202311,705,517Nanosheet transistors with strained channel regions202311,682,210Methods and device for video data analysis202311,664,422Nanosheet transistor with ultra low-k spacer and improved patterning robustness202311,637,041Method of forming high mobility complementary metal-oxide-semiconductor (CMOS) devices with fins on insulator202311,621,348Vertical transistor devices with composite high-K and low-K spacers with a controlled top junction202311,575,042Tunnel field-effect transistor with reduced subthreshold swing202311,515,401Vertical fin field effect transistor with a reduced gate-to-bottom source/drain parasitic capacitance202211,502,169Nanosheet semiconductor devices with n/p boundary structure202211,495,673Vertical fin field effect transistor with a reduced gate-to-bottom source/drain parasitic capacitance202211,453,911DNA sequencing with stacked nanopores202211,430,864VFET device with controllable top spacer202211,404,581Wimpy vertical transport field effect transistor with dipole liners202211,398,480Transistor having forked nanosheets with wraparound contacts202211,329,167Fishbone long channel nanosheet device202211,302,813Wrap around contact for nanosheet source drain epitaxy202211,289,484Forming source and drain regions for sheet transistors202211,273,442Programmable nuclease compositions and methods of use thereof202211,251,280Strained nanowire transistor with embedded epi202211,222,979Field-effect transistor devices with sidewall implant under bottom dielectric isolation202211,205,728Vertical field effect transistor with reduced parasitic capacitance202111,201,241Vertical field effect transistor and method of manufacturing a vertical field effect transistor202111,195,911Bottom dielectric isolation structure for nanosheet containing devices202111,196,0013D ReRAM formed by metal-assisted chemical etching with replacement wordline and wordline separation202111,177,369Stacked vertical field effect transistor with self-aligned junctions202111,164,940Method of forming III-V on insulator structure on semiconductor substrate202111,152,460High thermal budget compatible punch through stop integration using doped glass2021Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2021–2025Patents assigned to IBM (30)· patent assignee history
2021–2026Based in US· patent location history
2022–2023Patents assigned to MAMMOTH BIOSCIENCES INC (2)· patent assignee history
2023–2024Based in CN· patent location history
2024Patents assigned to CRRC QINGDAO SIFANG CO LTD (2)· patent assignee history
2025Patents assigned to APPLE INC (3)· patent assignee history
2026Patents assigned to ADEIA SEMICONDUCTOR SOLUTIONS LLC (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 30 | 2021–2025 |
| APPLE INC | 3 | 2025 |
| CRRC QINGDAO SIFANG CO LTD | 2 | 2024 |
| MAMMOTH BIOSCIENCES INC | 2 | 2022–2023 |
| ADEIA SEMICONDUCTOR SOLUTIONS LLC | 1 | 2026 |
Locations
| Location | Patents | Span |
|---|---|---|
| US | 37 | 2021–2026 |
| CN | 3 | 2023–2024 |