Inventor
Joseph J. Nahas
Inventor
Austin, TX, US
Overview
Patents· 41 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G11Cprimary
G11CStatic stores57%
H04MTelephonic communication11%
G06FElectric digital data processing6%
G05FSystems for regulating electric or magnetic variables4%
G07FCoin-freed or like apparatus4%
H01LSemiconductor devices4%
H03KPulse technique4%
H10DInorganic electric semiconductor devices4%
B82YSpecific uses or applications of nanostructures2%
H10BElectronic memory devices2%
PatentTitleYear
9,825,132'Systems and methods for filtering and computation using tunneling transistors'20179,362,919'Devices for utilizing symFETs for low-power information processing'20168,184,476'Random access memory architecture including midpoint reference'20127,543,211'Toggle memory burst'20097,370,260'MRAM having error correction code circuitry and method therefor'20087,292,484'Sense amplifier with multiple bits sharing a common reference'20077,280,388'MRAM with a write driver and method therefor'20077,266,486'Magnetoresistive random access memory simulation'20077,206,223'MRAM memory with residual write field reset'20077,154,772'MRAM architecture with electrically isolated read and write circuitry'20067,082,389'Method and apparatus for simulating a magnetoresistive random access memory (MRAM)'20067,012,841'Circuit and method for current pulse compensation'20066,944,052'Magnetoresistive random access memory (MRAM) cell having a diode with asymmetrical characteristics'20056,909,631'MRAM and methods for reading the MRAM'20056,903,964'MRAM architecture with electrically isolated read and write circuitry'20056,894,937'Accelerated life test of MRAM cells'20056,888,743'MRAM architecture'20056,859,388'Circuit for write field disturbance cancellation in an MRAM and method of operation'20056,842,365'Write driver for a magnetoresistive memory'20056,760,266'Sense amplifier and method for performing a read operation in a MRAM'20046,744,663'Circuit and method for reading a toggle memory cell'20046,714,440'Memory architecture with write circuitry and method therefor'20046,714,442'MRAM architecture with a grounded write bit line and electrically isolated read bit line'20046,711,068'Balanced load memory and method of operation'20046,711,052'Memory having a precharge circuit and method therefor'20046,700,814'Sense amplifier bias circuit for a memory having at least two distinct resistance states'20046,693,824'Circuit and method of writing a toggle memory'20046,667,899'Magnetic memory and method of bi-directional write current programming'20036,657,889'Memory having write current ramp rate control'20036,621,729'Sense amplifier incorporating a symmetric midpoint reference'20036,600,690'Sense amplifier for a memory having at least two distinct resistance states'20036,580,298'Three input sense amplifier and method of operation'20036,538,940'Method and circuitry for identifying weak bits in an MRAM'20036,091,287'Voltage regulator with automatic accelerated aging circuit'20005,614,816'Low voltage reference circuit and method of operation'19974,674,114'Fraud prevention in an electronic coin telephone set'19874,625,078'Fraud prevention in an electronic coin telephone set'19864,567,325'Controller for a coin telephone set'19864,539,552'Digital-to-analog converter'19854,357,496'Keypad logic interface circuit'19824,352,958'Electronically-switched multifrequency generator with transducer control'1982Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1982Patents assigned to BELL TELEPHONE LABOR INC (2)· patent assignee history
1982–1987Based in Wyomissing, PA, US· patent location history
1985–1986Patents assigned to AT & T BELL LAB (3)· patent assignee history
1986Patents assigned to AT & T TECHNOLOGIES INC (2)· patent assignee history
1997–2004Patents assigned to MOTOROLA INC (15)· patent assignee history
1997–2016Based in Austin, TX, US· patent location history
2004–2008Patents assigned to FREESCALE SEMICONDUCTOR INC (15)· patent assignee history
2017Based in Notre Dame, IN, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| FREESCALE SEMICONDUCTOR INC | 15 | 2004–2008 |
| MOTOROLA INC | 15 | 1997–2004 |
| AT & T BELL LAB | 3 | 1985–1986 |
| AT & T TECHNOLOGIES INC | 2 | 1986 |
| BELL TELEPHONE LABOR INC | 2 | 1982 |
Locations
| Location | Patents | Span |
|---|---|---|
| Austin, Texas, US | 34 | 1997–2016 |
| Wyomissing, Pennsylvania, US | 6 | 1982–1987 |
| Notre Dame, IN, US | 1 | 2017 |