Inventor
Antonio Vellei
Inventor
Villach, AT
Overview
Patents· 18 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H01Lprimary
H01LSemiconductor devices38%
H10DInorganic electric semiconductor devices33%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1017%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h108%
H10BElectronic memory devices4%
PatentTitleYear
10,978,418Method of forming an electrical contact and method of forming a chip package with a metal contact structure and protective layer202110,930,772IGBT having a barrier region202110,910,487Power semiconductor device having trench electrodes biased at three different electrical potentials, and method of manufacturing the same202110,854,739Method for producing IGBT with dV/dt controllability202010,840,362IGBT with dV/dt controllability202010,615,272Method for producing IGBT with dV/dt controllability202010,608,104Trench transistor device202010,461,056Chip package and method of forming a chip package with a metal contact structure and protective layer, and method of forming an electrical contact201910,439,055IGBT with dV/dt controllability201910,347,754Power semiconductor device with dV/dt controllability through select trench electrode biasing, and method of manufacturing the same201910,224,206Bipolar transistor device with an emitter having two types of emitter regions20199,899,504'Power semiconductor transistor having increased bipolar amplification'20189,741,571'Bipolar transistor device with an emitter having two types of emitter regions'20179,653,568'Method of manufacturing an insulated gate bipolar transistor with mesa sections between cell trench structures'20179,647,100'Semiconductor device with auxiliary structure including deep level dopants'20179,553,179'Semiconductor device and insulated gate bipolar transistor with barrier structure'20179,263,552'MOS-transistor with separated electrodes arranged in a trench'20169,076,838'Insulated gate bipolar transistor with mesa sections between cell trench structures and method of manufacturing'2015Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2015–2021Patents assigned to INFINEON TECHNOLOGIES AG (18)· patent assignee history
2015–2021Based in Villach, AT· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| INFINEON TECHNOLOGIES AG | 18 | 2015–2021 |
Locations
| Location | Patents | Span |
|---|---|---|
| Villach, AT | 18 | 2015–2021 |